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VincentZWCpaul-walmsley-sifive
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riscv: Avoid interrupts being erroneously enabled in handle_exception()
When the handle_exception function addresses an exception, the interrupts will be unconditionally enabled after finishing the context save. However, It may erroneously enable the interrupts if the interrupts are disabled before entering the handle_exception. For example, one of the WARN_ON() condition is satisfied in the scheduling where the interrupt is disabled and rq.lock is locked. The WARN_ON will trigger a break exception and the handle_exception function will enable the interrupts before entering do_trap_break function. During the procedure, if a timer interrupt is pending, it will be taken when interrupts are enabled. In this case, it may cause a deadlock problem if the rq.lock is locked again in the timer ISR. Hence, the handle_exception() can only enable interrupts when the state of sstatus.SPIE is 1. This patch is tested on HiFive Unleashed board. Signed-off-by: Vincent Chen <[email protected]> Reviewed-by: Palmer Dabbelt <[email protected]> [[email protected]: updated to apply] Fixes: bcae803 ("RISC-V: Enable IRQ during exception handling") Cc: David Abdurachmanov <[email protected]> Cc: [email protected] Signed-off-by: Paul Walmsley <[email protected]>
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arch/riscv/kernel/entry.S

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -166,9 +166,13 @@ ENTRY(handle_exception)
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move a0, sp /* pt_regs */
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tail do_IRQ
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1:
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/* Exceptions run with interrupts enabled */
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/* Exceptions run with interrupts enabled or disabled
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depending on the state of sstatus.SR_SPIE */
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andi t0, s1, SR_SPIE
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beqz t0, 1f
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csrs CSR_SSTATUS, SR_SIE
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1:
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/* Handle syscalls */
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li t0, EXC_SYSCALL
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beq s4, t0, handle_syscall

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