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Merge tag 'samsung-pinctrl-5.17' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v5.17 1. Add support for Exynos7885. 2. Drop usage of platform_get_resource().
2 parents 4b1643c + a382d56 commit c8eefdb

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4 files changed

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4 files changed

+90
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lines changed

‎Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ Required Properties:
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- "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
2323
- "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
2424
- "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
25+
- "samsung,exynos7885-pinctrl": for Exynos7885 compatible pin-controller.
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- "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller.
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- "samsung,exynosautov9-pinctrl": for ExynosAutov9 compatible pin-controller.
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‎drivers/pinctrl/samsung/pinctrl-exynos-arm64.c

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -441,6 +441,87 @@ const struct samsung_pinctrl_of_match_data exynos7_of_data __initconst = {
441441
.num_ctrl = ARRAY_SIZE(exynos7_pin_ctrl),
442442
};
443443

444+
/* pin banks of exynos7885 pin-controller 0 (ALIVE) */
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static const struct samsung_pin_bank_data exynos7885_pin_banks0[] __initconst = {
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EXYNOS_PIN_BANK_EINTN(3, 0x000, "etc0"),
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EXYNOS_PIN_BANK_EINTN(3, 0x020, "etc1"),
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EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa0", 0x00),
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EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa1", 0x04),
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EXYNOS850_PIN_BANK_EINTW(8, 0x080, "gpa2", 0x08),
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EXYNOS850_PIN_BANK_EINTW(5, 0x0a0, "gpq0", 0x0c),
452+
};
453+
454+
/* pin banks of exynos7885 pin-controller 1 (DISPAUD) */
455+
static const struct samsung_pin_bank_data exynos7885_pin_banks1[] __initconst = {
456+
EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(4, 0x020, "gpb1", 0x04),
458+
EXYNOS850_PIN_BANK_EINTG(5, 0x040, "gpb2", 0x08),
459+
};
460+
461+
/* pin banks of exynos7885 pin-controller 2 (FSYS) */
462+
static const struct samsung_pin_bank_data exynos7885_pin_banks2[] __initconst = {
463+
EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf2", 0x04),
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EXYNOS850_PIN_BANK_EINTG(6, 0x040, "gpf3", 0x08),
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EXYNOS850_PIN_BANK_EINTG(6, 0x060, "gpf4", 0x0c),
467+
};
468+
469+
/* pin banks of exynos7885 pin-controller 3 (TOP) */
470+
static const struct samsung_pin_bank_data exynos7885_pin_banks3[] __initconst = {
471+
EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpp0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(3, 0x020, "gpg0", 0x04),
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EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp1", 0x08),
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EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp2", 0x0c),
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EXYNOS850_PIN_BANK_EINTG(3, 0x080, "gpp3", 0x10),
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EXYNOS850_PIN_BANK_EINTG(6, 0x0a0, "gpp4", 0x14),
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EXYNOS850_PIN_BANK_EINTG(4, 0x0c0, "gpp5", 0x18),
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EXYNOS850_PIN_BANK_EINTG(5, 0x0e0, "gpp6", 0x1c),
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EXYNOS850_PIN_BANK_EINTG(2, 0x100, "gpp7", 0x20),
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EXYNOS850_PIN_BANK_EINTG(2, 0x120, "gpp8", 0x24),
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EXYNOS850_PIN_BANK_EINTG(8, 0x140, "gpg1", 0x28),
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EXYNOS850_PIN_BANK_EINTG(8, 0x160, "gpg2", 0x2c),
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EXYNOS850_PIN_BANK_EINTG(8, 0x180, "gpg3", 0x30),
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EXYNOS850_PIN_BANK_EINTG(2, 0x1a0, "gpg4", 0x34),
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EXYNOS850_PIN_BANK_EINTG(4, 0x1c0, "gpc0", 0x38),
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EXYNOS850_PIN_BANK_EINTG(8, 0x1e0, "gpc1", 0x3c),
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EXYNOS850_PIN_BANK_EINTG(8, 0x200, "gpc2", 0x40),
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};
489+
490+
static const struct samsung_pin_ctrl exynos7885_pin_ctrl[] __initconst = {
491+
{
492+
/* pin-controller instance 0 Alive data */
493+
.pin_banks = exynos7885_pin_banks0,
494+
.nr_banks = ARRAY_SIZE(exynos7885_pin_banks0),
495+
.eint_gpio_init = exynos_eint_gpio_init,
496+
.eint_wkup_init = exynos_eint_wkup_init,
497+
.suspend = exynos_pinctrl_suspend,
498+
.resume = exynos_pinctrl_resume,
499+
}, {
500+
/* pin-controller instance 1 DISPAUD data */
501+
.pin_banks = exynos7885_pin_banks1,
502+
.nr_banks = ARRAY_SIZE(exynos7885_pin_banks1),
503+
}, {
504+
/* pin-controller instance 2 FSYS data */
505+
.pin_banks = exynos7885_pin_banks2,
506+
.nr_banks = ARRAY_SIZE(exynos7885_pin_banks2),
507+
.eint_gpio_init = exynos_eint_gpio_init,
508+
.suspend = exynos_pinctrl_suspend,
509+
.resume = exynos_pinctrl_resume,
510+
}, {
511+
/* pin-controller instance 3 TOP data */
512+
.pin_banks = exynos7885_pin_banks3,
513+
.nr_banks = ARRAY_SIZE(exynos7885_pin_banks3),
514+
.eint_gpio_init = exynos_eint_gpio_init,
515+
.suspend = exynos_pinctrl_suspend,
516+
.resume = exynos_pinctrl_resume,
517+
},
518+
};
519+
520+
const struct samsung_pinctrl_of_match_data exynos7885_of_data __initconst = {
521+
.ctrl = exynos7885_pin_ctrl,
522+
.num_ctrl = ARRAY_SIZE(exynos7885_pin_ctrl),
523+
};
524+
444525
/* pin banks of exynos850 pin-controller 0 (ALIVE) */
445526
static const struct samsung_pin_bank_data exynos850_pin_banks0[] __initconst = {
446527
/* Must start with EINTG banks, ordered by EINT group number. */

‎drivers/pinctrl/samsung/pinctrl-samsung.c

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1095,7 +1095,6 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
10951095
struct samsung_pinctrl_drv_data *drvdata;
10961096
const struct samsung_pin_ctrl *ctrl;
10971097
struct device *dev = &pdev->dev;
1098-
struct resource *res;
10991098
int ret;
11001099

11011100
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
@@ -1109,9 +1108,11 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
11091108
}
11101109
drvdata->dev = dev;
11111110

1112-
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1113-
if (res)
1114-
drvdata->irq = res->start;
1111+
ret = platform_get_irq_optional(pdev, 0);
1112+
if (ret < 0 && ret != -ENXIO)
1113+
return ret;
1114+
if (ret > 0)
1115+
drvdata->irq = ret;
11151116

11161117
if (ctrl->retention_data) {
11171118
drvdata->retention_ctrl = ctrl->retention_data->init(drvdata,
@@ -1264,6 +1265,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
12641265
.data = &exynos5433_of_data },
12651266
{ .compatible = "samsung,exynos7-pinctrl",
12661267
.data = &exynos7_of_data },
1268+
{ .compatible = "samsung,exynos7885-pinctrl",
1269+
.data = &exynos7885_of_data },
12671270
{ .compatible = "samsung,exynos850-pinctrl",
12681271
.data = &exynos850_of_data },
12691272
{ .compatible = "samsung,exynosautov9-pinctrl",

‎drivers/pinctrl/samsung/pinctrl-samsung.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -339,6 +339,7 @@ extern const struct samsung_pinctrl_of_match_data exynos5410_of_data;
339339
extern const struct samsung_pinctrl_of_match_data exynos5420_of_data;
340340
extern const struct samsung_pinctrl_of_match_data exynos5433_of_data;
341341
extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
342+
extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
342343
extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
343344
extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;
344345
extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data;

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