Merge drm-intel-next-queued into gvt-next

Backmerge to pull in
https://patchwork.freedesktop.org/patch/353621/?series=73544&rev=1

Signed-off-by: Zhenyu Wang <[email protected]>

Author: zhenyw

.gitattributes

@@ -1,2 +1,4 @@
 *.c   diff=cpp
 *.h   diff=cpp
+*.dtsi diff=dts
+*.dts  diff=dts

.gitignore

@@ -32,7 +32,6 @@
 *.lzo
 *.mod
 *.mod.c
-*.ns_deps
 *.o
 *.o.*
 *.patch
@@ -61,6 +60,7 @@ modules.order
 /System.map
 /Module.markers
 /modules.builtin.modinfo
+/modules.nsdeps
 
 #
 # RPM spec file (make rpm-pkg)

.mailmap

@@ -32,6 +32,7 @@ Andy Adamson <[email protected]>
 Antoine Tenart <[email protected]>
 Antonio Ospite <[email protected]> <[email protected]>
 Archit Taneja <[email protected]>
+Ard Biesheuvel <[email protected]> <[email protected]>
 Arnaud Patard <[email protected]>
 Arnd Bergmann <[email protected]>
 Axel Dyks <[email protected]>
@@ -98,16 +99,24 @@ Jacob Shin <[email protected]>
 Jaegeuk Kim <[email protected]> <[email protected]>
 Jaegeuk Kim <[email protected]> <[email protected]>
 Jaegeuk Kim <[email protected]> <[email protected]>
+Jakub Kicinski <[email protected]> <[email protected]>
 James Bottomley <jejb@mulgrave.(none)>
 James Bottomley <[email protected]>
 James E Wilson <[email protected]>
 James Hogan <[email protected]> <[email protected]>
 James Hogan <[email protected]> <[email protected]>
 James Ketrenos <jketreno@io.(none)>
+Jan Glauber <[email protected]> <[email protected]>
+Jan Glauber <[email protected]> <[email protected]>
+Jan Glauber <[email protected]> <[email protected]>
 Jason Gunthorpe <[email protected]> <[email protected]>
 Jason Gunthorpe <[email protected]> <[email protected]>
 Javi Merino <[email protected]> <[email protected]>
 <[email protected]> <[email protected]>
+Jayachandran C <[email protected]> <[email protected]>
+Jayachandran C <[email protected]> <[email protected]>
+Jayachandran C <[email protected]> <[email protected]>
+Jayachandran C <[email protected]> <[email protected]>
 Jean Tourrilhes <[email protected]>
 <[email protected]> <[email protected]>
 Jeff Garzik <[email protected]>
@@ -144,13 +153,15 @@ Linus Lüssing <[email protected]> <[email protected]>
 Linus Lüssing <[email protected]> <[email protected]>
 Li Yang <[email protected]> <[email protected]>
 Li Yang <[email protected]> <[email protected]>
+Lukasz Luba <[email protected]> <[email protected]>
 Maciej W. Rozycki <[email protected]> <[email protected]>
 Marc Zyngier <[email protected]> <[email protected]>
 Marcin Nowakowski <[email protected]> <[email protected]>
 Mark Brown <[email protected]>
 Mark Yao <[email protected]> <[email protected]>
 Martin Kepplinger <[email protected]> <[email protected]>
 Martin Kepplinger <[email protected]> <[email protected]>
+Martin Kepplinger <[email protected]> <[email protected]>
 Mathieu Othacehe <[email protected]>
 Matthew Wilcox <[email protected]> <[email protected]>
 Matthew Wilcox <[email protected]> <[email protected]>
@@ -196,7 +207,8 @@ Oleksij Rempel <[email protected]> <[email protected]>
 Oleksij Rempel <[email protected]> <[email protected]>
 Paolo 'Blaisorblade' Giarrusso <[email protected]>
 Patrick Mochel <[email protected]>
-Paul Burton <[email protected]> <[email protected]>
+Paul Burton <[email protected]> <[email protected]>
+Paul Burton <[email protected]> <[email protected]>
 Peter A Jonsson <[email protected]>
 Peter Oruba <[email protected]>
 Peter Oruba <[email protected]>
@@ -229,6 +241,7 @@ Shuah Khan <[email protected]> <[email protected]>
 Shuah Khan <[email protected]> <[email protected]>
 Shuah Khan <[email protected]> <[email protected]>
 Shuah Khan <[email protected]> <[email protected]>
+Simon Arlott <[email protected]> <[email protected]>
 Simon Kelley <[email protected]>
 Stéphane Witzmann <[email protected]>
 Stephen Hemminger <[email protected]>
@@ -254,6 +267,7 @@ Vinod Koul <[email protected]> <[email protected]>
 Viresh Kumar <[email protected]> <[email protected]>
 Viresh Kumar <[email protected]> <[email protected]>
 Viresh Kumar <[email protected]> <[email protected]>
+Vivien Didelot <[email protected]> <[email protected]>
 Vlad Dogaru <[email protected]> <[email protected]>
 Vladimir Davydov <[email protected]> <[email protected]>
 Vladimir Davydov <[email protected]> <[email protected]>
@@ -265,3 +279,5 @@ Gustavo Padovan <[email protected]>
 Gustavo Padovan <[email protected]>
 Changbin Du <[email protected]> <[email protected]>
 Changbin Du <[email protected]> <[email protected]>
+Steve Wise <[email protected]> <[email protected]>
+Steve Wise <[email protected]> <[email protected]>

CREDITS

@@ -1637,6 +1637,10 @@ S: Panoramastrasse 18
 S: D-69126 Heidelberg
 S: Germany
 
+N: Simon Horman
+M: [email protected]
+D: Renesas ARM/ARM64 SoC maintainer
+
 N: Christopher Horn
 E: [email protected]
 D: Miscellaneous sysctl hacks
@@ -1871,8 +1875,9 @@ S: The Netherlands
 
 N: Martin Kepplinger
 E: [email protected]
-E: martin.kepplinger@ginzinger.com
+E: martin.kepplinger@puri.sm
 W: http://www.martinkepplinger.com
+P: 4096R/5AB387D3 F208 2B88 0F9E 4239 3468  6E3F 5003 98DF 5AB3 87D3
 D: mma8452 accelerators iio driver
 D: pegasus_notetaker input driver
 D: Kernel fixes and cleanups

Documentation/ABI/stable/sysfs-class-infiniband

@@ -314,25 +314,6 @@ Description:
 		board_id:	(RO) Manufacturing board ID
 
 
-sysfs interface for Chelsio T3 RDMA Driver (cxgb3)
---------------------------------------------------
-
-What:		/sys/class/infiniband/cxgb3_X/hw_rev
-What:		/sys/class/infiniband/cxgb3_X/hca_type
-What:		/sys/class/infiniband/cxgb3_X/board_id
-Date:		Feb, 2007
-KernelVersion:	v2.6.21
-Contact:	[email protected]
-Description:
-		hw_rev:		(RO) Hardware revision number
-
-		hca_type:	(RO) HCA type. Here it is a driver short name.
-				It should normally match the name in its bus
-				driver structure (e.g.  pci_driver::name).
-
-		board_id:	(RO) Manufacturing board id
-
-
 sysfs interface for Mellanox ConnectX HCA IB driver (mlx4)
 ----------------------------------------------------------
 

Documentation/ABI/stable/sysfs-driver-aspeed-vuart

@@ -6,10 +6,19 @@ Description:	Configures which IO port the host side of the UART
 Users:		OpenBMC.  Proposed changes should be mailed to
 		[email protected]
 
-What:		/sys/bus/platform/drivers/aspeed-vuart*/sirq
+What:		/sys/bus/platform/drivers/aspeed-vuart/*/sirq
 Date:		April 2017
 Contact:	Jeremy Kerr <[email protected]>
 Description:	Configures which interrupt number the host side of
 		the UART will appear on the host <-> BMC LPC bus.
 Users:		OpenBMC.  Proposed changes should be mailed to
 		[email protected]
+
+What:		/sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity
+Date:		July 2019
+Contact:	Oskar Senft <[email protected]>
+Description:	Configures the polarity of the serial interrupt to the
+		host via the BMC LPC bus.
+		Set to 0 for active-low or 1 for active-high.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		[email protected]

Documentation/ABI/stable/sysfs-driver-ib_srp

@@ -67,6 +67,8 @@ Description:	Interface for making ib_srp connect to a new target.
 		  initiator is allowed to queue per SCSI host. The default
 		  value for this parameter is 62. The lowest supported value
 		  is 2.
+		* max_it_iu_size, a decimal number specifying the maximum
+		  initiator to target information unit length.
 
 What:		/sys/class/infiniband_srp/srp-<hca>-<port_number>/ibdev
 Date:		January 2, 2006

Documentation/ABI/stable/sysfs-driver-mlxreg-io

@@ -29,13 +29,13 @@ Description:	This file shows the system fans direction:
 
 		The files are read only.
 
-What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_enable
+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version
 
 Date:		November 2018
 KernelVersion:	5.0
 Contact:	Vadim Pasternak <vadimpmellanox.com>
 Description:	These files show with which CPLD versions have been burned
-		on LED board.
+		on LED or Gearbox board.
 
 		The files are read only.
 
@@ -121,6 +121,15 @@ Description:	These files show the system reset cause, as following: ComEx
 
 		The files are read only.
 
+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_version
+Date:		November 2018
+KernelVersion:	5.0
+Contact:	Vadim Pasternak <vadimpmellanox.com>
+Description:	These files show with which CPLD versions have been burned
+		on LED board.
+
+		The files are read only.
+
 Date:		June 2019
 KernelVersion:	5.3
 Contact:	Vadim Pasternak <vadimpmellanox.com>

Documentation/ABI/testing/debugfs-hisi-hpre

@@ -0,0 +1,57 @@
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/regs
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    Dump debug registers from the HPRE cluster.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/cluster_ctrl
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    Write the HPRE core selection in the cluster into this file,
+		and then we can read the debug information of the core.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/rdclr_en
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    HPRE cores debug registers read clear control. 1 means enable
+		register read clear, otherwise 0. Writing to this file has no
+		functional effect, only enable or disable counters clear after
+		reading of these registers.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/current_qm
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    One HPRE controller has one PF and multiple VFs, each function
+		has a QM. Select the QM which below qm refers to.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/regs
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    Dump debug registers from the HPRE.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/qm/qm_regs
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    Dump debug registers from the QM.
+		Available for PF and VF in host. VF in guest currently only
+		has one debug register.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/qm/current_q
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    One QM may contain multiple queues. Select specific queue to
+		show its debug registers in above qm_regs.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_hpre/<bdf>/qm/clear_enable
+Date:           Sep 2019
+Contact:        [email protected]
+Description:    QM debug registers(qm_regs) read clear control. 1 means enable
+		register read clear, otherwise 0.
+		Writing to this file has no functional effect, only enable or
+		disable counters clear after reading of these registers.
+		Only available for PF.

Documentation/ABI/testing/debugfs-hisi-sec

@@ -0,0 +1,43 @@
+What:           /sys/kernel/debug/hisi_sec/<bdf>/sec_dfx
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    Dump the debug registers of SEC cores.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_sec/<bdf>/clear_enable
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    Enabling/disabling of clear action after reading
+		the SEC debug registers.
+		0: disable, 1: enable.
+		Only available for PF, and take no other effect on SEC.
+
+What:           /sys/kernel/debug/hisi_sec/<bdf>/current_qm
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    One SEC controller has one PF and multiple VFs, each function
+		has a QM. This file can be used to select the QM which below
+		qm refers to.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_sec/<bdf>/qm/qm_regs
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    Dump of QM related debug registers.
+		Available for PF and VF in host. VF in guest currently only
+		has one debug register.
+
+What:           /sys/kernel/debug/hisi_sec/<bdf>/qm/current_q
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    One QM of SEC may contain multiple queues. Select specific
+		queue to show its debug registers in above 'qm_regs'.
+		Only available for PF.
+
+What:           /sys/kernel/debug/hisi_sec/<bdf>/qm/clear_enable
+Date:           Oct 2019
+Contact:        [email protected]
+Description:    Enabling/disabling of clear action after reading
+		the SEC's QM debug registers.
+		0: disable, 1: enable.
+		Only available for PF, and take no other effect on SEC.