@@ -137,38 +137,38 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
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{ CS42L43_ASP_TX_CH4_CTRL , 0x00170091 },
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{ CS42L43_ASP_TX_CH5_CTRL , 0x001700C1 },
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{ CS42L43_ASP_TX_CH6_CTRL , 0x001700F1 },
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- { CS42L43_ASPTX1_INPUT , 0x00800000 },
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- { CS42L43_ASPTX2_INPUT , 0x00800000 },
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- { CS42L43_ASPTX3_INPUT , 0x00800000 },
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- { CS42L43_ASPTX4_INPUT , 0x00800000 },
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- { CS42L43_ASPTX5_INPUT , 0x00800000 },
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- { CS42L43_ASPTX6_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP1_CH1_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP1_CH2_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP1_CH3_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP1_CH4_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP2_CH1_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP2_CH2_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP3_CH1_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP3_CH2_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP4_CH1_INPUT , 0x00800000 },
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- { CS42L43_SWIRE_DP4_CH2_INPUT , 0x00800000 },
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- { CS42L43_ASRC_INT1_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_INT2_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_INT3_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_INT4_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_DEC1_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_DEC2_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_DEC3_INPUT1 , 0x00800000 },
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- { CS42L43_ASRC_DEC4_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC1INT1_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC1INT2_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC1DEC1_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC1DEC2_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC2INT1_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC2INT2_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC2DEC1_INPUT1 , 0x00800000 },
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- { CS42L43_ISRC2DEC2_INPUT1 , 0x00800000 },
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+ { CS42L43_ASPTX1_INPUT , 0x00000000 },
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+ { CS42L43_ASPTX2_INPUT , 0x00000000 },
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+ { CS42L43_ASPTX3_INPUT , 0x00000000 },
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+ { CS42L43_ASPTX4_INPUT , 0x00000000 },
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+ { CS42L43_ASPTX5_INPUT , 0x00000000 },
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+ { CS42L43_ASPTX6_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP1_CH1_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP1_CH2_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP1_CH3_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP1_CH4_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP2_CH1_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP2_CH2_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP3_CH1_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP3_CH2_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP4_CH1_INPUT , 0x00000000 },
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+ { CS42L43_SWIRE_DP4_CH2_INPUT , 0x00000000 },
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+ { CS42L43_ASRC_INT1_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_INT2_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_INT3_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_INT4_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_DEC1_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_DEC2_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_DEC3_INPUT1 , 0x00000000 },
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+ { CS42L43_ASRC_DEC4_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC1INT1_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC1INT2_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC1DEC1_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC1DEC2_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC2INT1_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC2INT2_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC2DEC1_INPUT1 , 0x00000000 },
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+ { CS42L43_ISRC2DEC2_INPUT1 , 0x00000000 },
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{ CS42L43_EQ1MIX_INPUT1 , 0x00800000 },
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{ CS42L43_EQ1MIX_INPUT2 , 0x00800000 },
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{ CS42L43_EQ1MIX_INPUT3 , 0x00800000 },
@@ -177,8 +177,8 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
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{ CS42L43_EQ2MIX_INPUT2 , 0x00800000 },
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{ CS42L43_EQ2MIX_INPUT3 , 0x00800000 },
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{ CS42L43_EQ2MIX_INPUT4 , 0x00800000 },
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- { CS42L43_SPDIF1_INPUT1 , 0x00800000 },
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- { CS42L43_SPDIF2_INPUT1 , 0x00800000 },
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+ { CS42L43_SPDIF1_INPUT1 , 0x00000000 },
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+ { CS42L43_SPDIF2_INPUT1 , 0x00000000 },
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{ CS42L43_AMP1MIX_INPUT1 , 0x00800000 },
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{ CS42L43_AMP1MIX_INPUT2 , 0x00800000 },
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{ CS42L43_AMP1MIX_INPUT3 , 0x00800000 },
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