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Prashant Malani
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platform/chrome: cros_typec_switch: Add Pin D support
The ChromeOS EC's mux interface allows us to specify whether the port should be configured for Pin Assignment D in DisplayPort alternate mode (i.e 2 lanes USB + 2 lanes DP). Update the function that determines mux state to account for Pin Assignment D and return the appropriate mux setting. Cc: Heikki Krogerus <[email protected]> Signed-off-by: Prashant Malani <[email protected]> Acked-by: Heikki Krogerus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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drivers/platform/chrome/cros_typec_switch.c

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,13 +51,18 @@ static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, int port
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static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt)
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{
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int ret = -EOPNOTSUPP;
54+
u8 pin_assign;
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55-
if (mode == TYPEC_STATE_SAFE)
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if (mode == TYPEC_STATE_SAFE) {
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ret = USB_PD_MUX_SAFE_MODE;
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else if (mode == TYPEC_STATE_USB)
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} else if (mode == TYPEC_STATE_USB) {
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ret = USB_PD_MUX_USB_ENABLED;
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else if (alt && alt->svid == USB_TYPEC_DP_SID)
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} else if (alt && alt->svid == USB_TYPEC_DP_SID) {
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ret = USB_PD_MUX_DP_ENABLED;
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pin_assign = mode - TYPEC_STATE_MODAL;
63+
if (pin_assign & DP_PIN_ASSIGN_D)
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ret |= USB_PD_MUX_USB_ENABLED;
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}
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return ret;
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}

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