|
50 | 50 | #define RS9_REG_DID_TYPE_DMV (0x2 << RS9_REG_DID_TYPE_SHIFT)
|
51 | 51 | #define RS9_REG_DID_TYPE_SHIFT 0x6
|
52 | 52 |
|
53 |
| -/* Supported Renesas 9-series models. */ |
54 |
| -enum rs9_model { |
55 |
| - RENESAS_9FGV0241, |
56 |
| - RENESAS_9FGV0441, |
57 |
| -}; |
58 |
| - |
59 | 53 | /* Structure to describe features of a particular 9-series model */
|
60 | 54 | struct rs9_chip_info {
|
61 |
| - const enum rs9_model model; |
62 | 55 | unsigned int num_clks;
|
| 56 | + u8 outshift; |
63 | 57 | u8 did;
|
64 | 58 | };
|
65 | 59 |
|
@@ -161,14 +155,12 @@ static const struct regmap_config rs9_regmap_config = {
|
161 | 155 |
|
162 | 156 | static u8 rs9_calc_dif(const struct rs9_driver_data *rs9, int idx)
|
163 | 157 | {
|
164 |
| - enum rs9_model model = rs9->chip_info->model; |
165 |
| - |
166 |
| - if (model == RENESAS_9FGV0241) |
167 |
| - return BIT(idx) + 1; |
168 |
| - else if (model == RENESAS_9FGV0441) |
169 |
| - return BIT(idx); |
170 |
| - |
171 |
| - return 0; |
| 158 | + /* |
| 159 | + * On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE(1) is BIT(2), |
| 160 | + * on 9FGV0441 and 9FGV0841 the DIF OE0 is BIT(0) and so on. |
| 161 | + * Increment the index in the 9FGV0241 special case here. |
| 162 | + */ |
| 163 | + return BIT(idx + rs9->chip_info->outshift); |
172 | 164 | }
|
173 | 165 |
|
174 | 166 | static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx)
|
@@ -382,14 +374,14 @@ static int __maybe_unused rs9_resume(struct device *dev)
|
382 | 374 | }
|
383 | 375 |
|
384 | 376 | static const struct rs9_chip_info renesas_9fgv0241_info = {
|
385 |
| - .model = RENESAS_9FGV0241, |
386 | 377 | .num_clks = 2,
|
| 378 | + .outshift = 1, |
387 | 379 | .did = RS9_REG_DID_TYPE_FGV | 0x02,
|
388 | 380 | };
|
389 | 381 |
|
390 | 382 | static const struct rs9_chip_info renesas_9fgv0441_info = {
|
391 |
| - .model = RENESAS_9FGV0441, |
392 | 383 | .num_clks = 4,
|
| 384 | + .outshift = 0, |
393 | 385 | .did = RS9_REG_DID_TYPE_FGV | 0x04,
|
394 | 386 | };
|
395 | 387 |
|
|
0 commit comments