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EDAC/i10nm: Update driver to support different bus number config register offsets
The i10nm_edac driver failed to load on Ice Lake and Tremont/Jacobsville servers if their CPU stepping >= 4 and failed on Ice Lake-D servers from stepping 0. The root cause was that for Ice Lake and Tremont/Jacobsville servers with CPU stepping >=4, the offset for bus number configuration register was updated from 0xcc to 0xd0. For Ice Lake-D servers, all the steppings use the updated 0xd0 offset. Fix the issue by using the appropriate offset for bus number configuration register according to the CPU model number and stepping. Reported-by: Jerry Chen <[email protected]> Reported-and-tested-by: Jin Wen <[email protected]> Signed-off-by: Qiuxu Zhuo <[email protected]> Signed-off-by: Tony Luck <[email protected]> Reviewed-by: Borislav Petkov <[email protected]> Link: https://lore.kernel.org/linux-edac/[email protected]
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drivers/edac/i10nm_base.c

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -122,16 +122,22 @@ static int i10nm_get_all_munits(void)
122122
return 0;
123123
}
124124

125-
static struct res_config i10nm_cfg = {
125+
static struct res_config i10nm_cfg0 = {
126126
.type = I10NM,
127127
.decs_did = 0x3452,
128128
.busno_cfg_offset = 0xcc,
129129
};
130130

131+
static struct res_config i10nm_cfg1 = {
132+
.type = I10NM,
133+
.decs_did = 0x3452,
134+
.busno_cfg_offset = 0xd0,
135+
};
136+
131137
static const struct x86_cpu_id i10nm_cpuids[] = {
132-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &i10nm_cfg),
133-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &i10nm_cfg),
134-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &i10nm_cfg),
138+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &i10nm_cfg0),
139+
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &i10nm_cfg0),
140+
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &i10nm_cfg1),
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{}
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};
137143
MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
@@ -258,6 +264,10 @@ static int __init i10nm_init(void)
258264

259265
cfg = (struct res_config *)id->driver_data;
260266

267+
/* Newer steppings have different offset for ATOM_TREMONT_D/ICELAKE_X */
268+
if (boot_cpu_data.x86_stepping >= 4)
269+
cfg->busno_cfg_offset = 0xd0;
270+
261271
rc = skx_get_hi_lo(0x09a2, off, &tolm, &tohm);
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if (rc)
263273
return rc;

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