Skip to content

Commit ce2f84e

Browse files
committed
Merge branch 'aquantia-phy-aqr115c' into main
Bartosz Golaszewski says: ==================== net: phy: aquantia: enable support for aqr115c This series addesses two issues with the aqr115c PHY on Qualcomm sa8775p-ride-r3 board and adds support for this PHY to the aquantia driver. While the manufacturer calls the 2.5G PHY mode OCSGMII, we reuse the existing 2500BASEX mode in the kernel to avoid extending the uAPI. It took me a while to resend because I noticed an issue with the PHY coming out of suspend with no possible interfaces listed and tracked it to the GLOBAL_CFG registers for different modes returning 0. A workaround has been added to the series. Unfortunately the HPG doesn't mention a proper way of doing it or even mention any such issue at all. Changes since v2: - add a patch that addresses an issue with GLOBAL_CFG registers returning 0 - reuse aqr113c_config_init() for aqr115c - improve commit messages, give more details on the 2500BASEX mode reuse Link to v2: https://lore.kernel.org/lkml/[email protected]/T/ Changes since v1: - split out the PHY patches into their own series - don't introduce new mode (OCSGMII) but use existing 2500BASEX instead - split the wait-for-FW patch into two: one renaming and exporting the relevant function and the second using it before checking the FW ID Link to v1: https://lore.kernel.org/linux-arm-kernel/[email protected]/T/ ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 40ab9e0 + 0ebc581 commit ce2f84e

File tree

3 files changed

+42
-4
lines changed

3 files changed

+42
-4
lines changed

drivers/net/phy/aquantia/aquantia.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -201,4 +201,6 @@ int aqr_phy_led_hw_control_set(struct phy_device *phydev, u8 index,
201201
int aqr_phy_led_active_low_set(struct phy_device *phydev, int index, bool enable);
202202
int aqr_phy_led_polarity_set(struct phy_device *phydev, int index,
203203
unsigned long modes);
204+
int aqr_wait_reset_complete(struct phy_device *phydev);
205+
204206
#endif /* AQUANTIA_H */

drivers/net/phy/aquantia/aquantia_firmware.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -353,6 +353,10 @@ int aqr_firmware_load(struct phy_device *phydev)
353353
{
354354
int ret;
355355

356+
ret = aqr_wait_reset_complete(phydev);
357+
if (ret)
358+
return ret;
359+
356360
/* Check if the firmware is not already loaded by pooling
357361
* the current version returned by the PHY. If 0 is returned,
358362
* no firmware is loaded.

drivers/net/phy/aquantia/aquantia_main.c

Lines changed: 36 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#define PHY_ID_AQR113 0x31c31c40
3030
#define PHY_ID_AQR113C 0x31c31c12
3131
#define PHY_ID_AQR114C 0x31c31c22
32+
#define PHY_ID_AQR115C 0x31c31c33
3233
#define PHY_ID_AQR813 0x31c31cb2
3334

3435
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
@@ -441,7 +442,7 @@ static int aqr107_set_tunable(struct phy_device *phydev,
441442
* The chip also provides a "reset completed" bit, but it's cleared after
442443
* read. Therefore function would time out if called again.
443444
*/
444-
static int aqr107_wait_reset_complete(struct phy_device *phydev)
445+
int aqr_wait_reset_complete(struct phy_device *phydev)
445446
{
446447
int val;
447448

@@ -494,7 +495,7 @@ static int aqr107_config_init(struct phy_device *phydev)
494495
WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
495496
"Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
496497

497-
ret = aqr107_wait_reset_complete(phydev);
498+
ret = aqr_wait_reset_complete(phydev);
498499
if (!ret)
499500
aqr107_chip_info(phydev);
500501

@@ -522,7 +523,7 @@ static int aqcs109_config_init(struct phy_device *phydev)
522523
phydev->interface != PHY_INTERFACE_MODE_2500BASEX)
523524
return -ENODEV;
524525

525-
ret = aqr107_wait_reset_complete(phydev);
526+
ret = aqr_wait_reset_complete(phydev);
526527
if (!ret)
527528
aqr107_chip_info(phydev);
528529

@@ -652,7 +653,13 @@ static int aqr107_fill_interface_modes(struct phy_device *phydev)
652653
unsigned long *possible = phydev->possible_interfaces;
653654
unsigned int serdes_mode, rate_adapt;
654655
phy_interface_t interface;
655-
int i, val;
656+
int i, val, ret;
657+
658+
ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
659+
VEND1_GLOBAL_CFG_10M, val, val != 0,
660+
1000, 100000, false);
661+
if (ret)
662+
return ret;
656663

657664
/* Walk the media-speed configuration registers to determine which
658665
* host-side serdes modes may be used by the PHY depending on the
@@ -999,6 +1006,30 @@ static struct phy_driver aqr_driver[] = {
9991006
.led_hw_control_get = aqr_phy_led_hw_control_get,
10001007
.led_polarity_set = aqr_phy_led_polarity_set,
10011008
},
1009+
{
1010+
PHY_ID_MATCH_MODEL(PHY_ID_AQR115C),
1011+
.name = "Aquantia AQR115C",
1012+
.probe = aqr107_probe,
1013+
.get_rate_matching = aqr107_get_rate_matching,
1014+
.config_init = aqr113c_config_init,
1015+
.config_aneg = aqr_config_aneg,
1016+
.config_intr = aqr_config_intr,
1017+
.handle_interrupt = aqr_handle_interrupt,
1018+
.read_status = aqr107_read_status,
1019+
.get_tunable = aqr107_get_tunable,
1020+
.set_tunable = aqr107_set_tunable,
1021+
.suspend = aqr107_suspend,
1022+
.resume = aqr107_resume,
1023+
.get_sset_count = aqr107_get_sset_count,
1024+
.get_strings = aqr107_get_strings,
1025+
.get_stats = aqr107_get_stats,
1026+
.link_change_notify = aqr107_link_change_notify,
1027+
.led_brightness_set = aqr_phy_led_brightness_set,
1028+
.led_hw_is_supported = aqr_phy_led_hw_is_supported,
1029+
.led_hw_control_set = aqr_phy_led_hw_control_set,
1030+
.led_hw_control_get = aqr_phy_led_hw_control_get,
1031+
.led_polarity_set = aqr_phy_led_polarity_set,
1032+
},
10021033
{
10031034
PHY_ID_MATCH_MODEL(PHY_ID_AQR813),
10041035
.name = "Aquantia AQR813",
@@ -1042,6 +1073,7 @@ static struct mdio_device_id __maybe_unused aqr_tbl[] = {
10421073
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
10431074
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
10441075
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },
1076+
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR115C) },
10451077
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
10461078
{ }
10471079
};

0 commit comments

Comments
 (0)