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AntonioBorneoMarc Zyngier
AntonioBorneo
authored and
Marc Zyngier
committed
irqchip/stm32-exti: Read event trigger type from event_trg register
The flag reporting whether an event is 'direct' or 'configurable' is available in the read-only registers EVENT_TRG. Drop this redundant information from the struct stm32_desc_irq and use the proper bit from EVENT_TRG register. On armv7a this patch reduces by 3% the size of the driver, from text data bss dec hex filename 7233 424 4 7661 1ded irq-stm32-exti.o to 6977 424 4 7405 1ced irq-stm32-exti.o Signed-off-by: Antonio Borneo <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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‎drivers/irqchip/irq-stm32-exti.c

Lines changed: 96 additions & 84 deletions
Original file line numberDiff line numberDiff line change
@@ -34,14 +34,14 @@ struct stm32_exti_bank {
3434
u32 swier_ofst;
3535
u32 rpr_ofst;
3636
u32 fpr_ofst;
37+
u32 trg_ofst;
3738
};
3839

3940
#define UNDEF_REG ~0
4041

4142
struct stm32_desc_irq {
4243
u32 exti;
4344
u32 irq_parent;
44-
struct irq_chip *chip;
4545
};
4646

4747
struct stm32_exti_drv_data {
@@ -78,6 +78,7 @@ static const struct stm32_exti_bank stm32f4xx_exti_b1 = {
7878
.swier_ofst = 0x10,
7979
.rpr_ofst = 0x14,
8080
.fpr_ofst = UNDEF_REG,
81+
.trg_ofst = UNDEF_REG,
8182
};
8283

8384
static const struct stm32_exti_bank *stm32f4xx_exti_banks[] = {
@@ -97,6 +98,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b1 = {
9798
.swier_ofst = 0x08,
9899
.rpr_ofst = 0x88,
99100
.fpr_ofst = UNDEF_REG,
101+
.trg_ofst = UNDEF_REG,
100102
};
101103

102104
static const struct stm32_exti_bank stm32h7xx_exti_b2 = {
@@ -107,6 +109,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b2 = {
107109
.swier_ofst = 0x28,
108110
.rpr_ofst = 0x98,
109111
.fpr_ofst = UNDEF_REG,
112+
.trg_ofst = UNDEF_REG,
110113
};
111114

112115
static const struct stm32_exti_bank stm32h7xx_exti_b3 = {
@@ -117,6 +120,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b3 = {
117120
.swier_ofst = 0x48,
118121
.rpr_ofst = 0xA8,
119122
.fpr_ofst = UNDEF_REG,
123+
.trg_ofst = UNDEF_REG,
120124
};
121125

122126
static const struct stm32_exti_bank *stm32h7xx_exti_banks[] = {
@@ -138,6 +142,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = {
138142
.swier_ofst = 0x08,
139143
.rpr_ofst = 0x0C,
140144
.fpr_ofst = 0x10,
145+
.trg_ofst = 0x3EC,
141146
};
142147

143148
static const struct stm32_exti_bank stm32mp1_exti_b2 = {
@@ -148,6 +153,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = {
148153
.swier_ofst = 0x28,
149154
.rpr_ofst = 0x2C,
150155
.fpr_ofst = 0x30,
156+
.trg_ofst = 0x3E8,
151157
};
152158

153159
static const struct stm32_exti_bank stm32mp1_exti_b3 = {
@@ -158,6 +164,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b3 = {
158164
.swier_ofst = 0x48,
159165
.rpr_ofst = 0x4C,
160166
.fpr_ofst = 0x50,
167+
.trg_ofst = 0x3E4,
161168
};
162169

163170
static const struct stm32_exti_bank *stm32mp1_exti_banks[] = {
@@ -170,90 +177,90 @@ static struct irq_chip stm32_exti_h_chip;
170177
static struct irq_chip stm32_exti_h_chip_direct;
171178

172179
static const struct stm32_desc_irq stm32mp1_desc_irq[] = {
173-
{ .exti = 0, .irq_parent = 6, .chip = &stm32_exti_h_chip },
174-
{ .exti = 1, .irq_parent = 7, .chip = &stm32_exti_h_chip },
175-
{ .exti = 2, .irq_parent = 8, .chip = &stm32_exti_h_chip },
176-
{ .exti = 3, .irq_parent = 9, .chip = &stm32_exti_h_chip },
177-
{ .exti = 4, .irq_parent = 10, .chip = &stm32_exti_h_chip },
178-
{ .exti = 5, .irq_parent = 23, .chip = &stm32_exti_h_chip },
179-
{ .exti = 6, .irq_parent = 64, .chip = &stm32_exti_h_chip },
180-
{ .exti = 7, .irq_parent = 65, .chip = &stm32_exti_h_chip },
181-
{ .exti = 8, .irq_parent = 66, .chip = &stm32_exti_h_chip },
182-
{ .exti = 9, .irq_parent = 67, .chip = &stm32_exti_h_chip },
183-
{ .exti = 10, .irq_parent = 40, .chip = &stm32_exti_h_chip },
184-
{ .exti = 11, .irq_parent = 42, .chip = &stm32_exti_h_chip },
185-
{ .exti = 12, .irq_parent = 76, .chip = &stm32_exti_h_chip },
186-
{ .exti = 13, .irq_parent = 77, .chip = &stm32_exti_h_chip },
187-
{ .exti = 14, .irq_parent = 121, .chip = &stm32_exti_h_chip },
188-
{ .exti = 15, .irq_parent = 127, .chip = &stm32_exti_h_chip },
189-
{ .exti = 16, .irq_parent = 1, .chip = &stm32_exti_h_chip },
190-
{ .exti = 19, .irq_parent = 3, .chip = &stm32_exti_h_chip_direct },
191-
{ .exti = 21, .irq_parent = 31, .chip = &stm32_exti_h_chip_direct },
192-
{ .exti = 22, .irq_parent = 33, .chip = &stm32_exti_h_chip_direct },
193-
{ .exti = 23, .irq_parent = 72, .chip = &stm32_exti_h_chip_direct },
194-
{ .exti = 24, .irq_parent = 95, .chip = &stm32_exti_h_chip_direct },
195-
{ .exti = 25, .irq_parent = 107, .chip = &stm32_exti_h_chip_direct },
196-
{ .exti = 26, .irq_parent = 37, .chip = &stm32_exti_h_chip_direct },
197-
{ .exti = 27, .irq_parent = 38, .chip = &stm32_exti_h_chip_direct },
198-
{ .exti = 28, .irq_parent = 39, .chip = &stm32_exti_h_chip_direct },
199-
{ .exti = 29, .irq_parent = 71, .chip = &stm32_exti_h_chip_direct },
200-
{ .exti = 30, .irq_parent = 52, .chip = &stm32_exti_h_chip_direct },
201-
{ .exti = 31, .irq_parent = 53, .chip = &stm32_exti_h_chip_direct },
202-
{ .exti = 32, .irq_parent = 82, .chip = &stm32_exti_h_chip_direct },
203-
{ .exti = 33, .irq_parent = 83, .chip = &stm32_exti_h_chip_direct },
204-
{ .exti = 47, .irq_parent = 93, .chip = &stm32_exti_h_chip_direct },
205-
{ .exti = 48, .irq_parent = 138, .chip = &stm32_exti_h_chip_direct },
206-
{ .exti = 50, .irq_parent = 139, .chip = &stm32_exti_h_chip_direct },
207-
{ .exti = 52, .irq_parent = 140, .chip = &stm32_exti_h_chip_direct },
208-
{ .exti = 53, .irq_parent = 141, .chip = &stm32_exti_h_chip_direct },
209-
{ .exti = 54, .irq_parent = 135, .chip = &stm32_exti_h_chip_direct },
210-
{ .exti = 61, .irq_parent = 100, .chip = &stm32_exti_h_chip_direct },
211-
{ .exti = 65, .irq_parent = 144, .chip = &stm32_exti_h_chip },
212-
{ .exti = 68, .irq_parent = 143, .chip = &stm32_exti_h_chip },
213-
{ .exti = 70, .irq_parent = 62, .chip = &stm32_exti_h_chip_direct },
214-
{ .exti = 73, .irq_parent = 129, .chip = &stm32_exti_h_chip },
180+
{ .exti = 0, .irq_parent = 6 },
181+
{ .exti = 1, .irq_parent = 7 },
182+
{ .exti = 2, .irq_parent = 8 },
183+
{ .exti = 3, .irq_parent = 9 },
184+
{ .exti = 4, .irq_parent = 10 },
185+
{ .exti = 5, .irq_parent = 23 },
186+
{ .exti = 6, .irq_parent = 64 },
187+
{ .exti = 7, .irq_parent = 65 },
188+
{ .exti = 8, .irq_parent = 66 },
189+
{ .exti = 9, .irq_parent = 67 },
190+
{ .exti = 10, .irq_parent = 40 },
191+
{ .exti = 11, .irq_parent = 42 },
192+
{ .exti = 12, .irq_parent = 76 },
193+
{ .exti = 13, .irq_parent = 77 },
194+
{ .exti = 14, .irq_parent = 121 },
195+
{ .exti = 15, .irq_parent = 127 },
196+
{ .exti = 16, .irq_parent = 1 },
197+
{ .exti = 19, .irq_parent = 3 },
198+
{ .exti = 21, .irq_parent = 31 },
199+
{ .exti = 22, .irq_parent = 33 },
200+
{ .exti = 23, .irq_parent = 72 },
201+
{ .exti = 24, .irq_parent = 95 },
202+
{ .exti = 25, .irq_parent = 107 },
203+
{ .exti = 26, .irq_parent = 37 },
204+
{ .exti = 27, .irq_parent = 38 },
205+
{ .exti = 28, .irq_parent = 39 },
206+
{ .exti = 29, .irq_parent = 71 },
207+
{ .exti = 30, .irq_parent = 52 },
208+
{ .exti = 31, .irq_parent = 53 },
209+
{ .exti = 32, .irq_parent = 82 },
210+
{ .exti = 33, .irq_parent = 83 },
211+
{ .exti = 47, .irq_parent = 93 },
212+
{ .exti = 48, .irq_parent = 138 },
213+
{ .exti = 50, .irq_parent = 139 },
214+
{ .exti = 52, .irq_parent = 140 },
215+
{ .exti = 53, .irq_parent = 141 },
216+
{ .exti = 54, .irq_parent = 135 },
217+
{ .exti = 61, .irq_parent = 100 },
218+
{ .exti = 65, .irq_parent = 144 },
219+
{ .exti = 68, .irq_parent = 143 },
220+
{ .exti = 70, .irq_parent = 62 },
221+
{ .exti = 73, .irq_parent = 129 },
215222
};
216223

217224
static const struct stm32_desc_irq stm32mp13_desc_irq[] = {
218-
{ .exti = 0, .irq_parent = 6, .chip = &stm32_exti_h_chip },
219-
{ .exti = 1, .irq_parent = 7, .chip = &stm32_exti_h_chip },
220-
{ .exti = 2, .irq_parent = 8, .chip = &stm32_exti_h_chip },
221-
{ .exti = 3, .irq_parent = 9, .chip = &stm32_exti_h_chip },
222-
{ .exti = 4, .irq_parent = 10, .chip = &stm32_exti_h_chip },
223-
{ .exti = 5, .irq_parent = 24, .chip = &stm32_exti_h_chip },
224-
{ .exti = 6, .irq_parent = 65, .chip = &stm32_exti_h_chip },
225-
{ .exti = 7, .irq_parent = 66, .chip = &stm32_exti_h_chip },
226-
{ .exti = 8, .irq_parent = 67, .chip = &stm32_exti_h_chip },
227-
{ .exti = 9, .irq_parent = 68, .chip = &stm32_exti_h_chip },
228-
{ .exti = 10, .irq_parent = 41, .chip = &stm32_exti_h_chip },
229-
{ .exti = 11, .irq_parent = 43, .chip = &stm32_exti_h_chip },
230-
{ .exti = 12, .irq_parent = 77, .chip = &stm32_exti_h_chip },
231-
{ .exti = 13, .irq_parent = 78, .chip = &stm32_exti_h_chip },
232-
{ .exti = 14, .irq_parent = 106, .chip = &stm32_exti_h_chip },
233-
{ .exti = 15, .irq_parent = 109, .chip = &stm32_exti_h_chip },
234-
{ .exti = 16, .irq_parent = 1, .chip = &stm32_exti_h_chip },
235-
{ .exti = 19, .irq_parent = 3, .chip = &stm32_exti_h_chip_direct },
236-
{ .exti = 21, .irq_parent = 32, .chip = &stm32_exti_h_chip_direct },
237-
{ .exti = 22, .irq_parent = 34, .chip = &stm32_exti_h_chip_direct },
238-
{ .exti = 23, .irq_parent = 73, .chip = &stm32_exti_h_chip_direct },
239-
{ .exti = 24, .irq_parent = 93, .chip = &stm32_exti_h_chip_direct },
240-
{ .exti = 25, .irq_parent = 114, .chip = &stm32_exti_h_chip_direct },
241-
{ .exti = 26, .irq_parent = 38, .chip = &stm32_exti_h_chip_direct },
242-
{ .exti = 27, .irq_parent = 39, .chip = &stm32_exti_h_chip_direct },
243-
{ .exti = 28, .irq_parent = 40, .chip = &stm32_exti_h_chip_direct },
244-
{ .exti = 29, .irq_parent = 72, .chip = &stm32_exti_h_chip_direct },
245-
{ .exti = 30, .irq_parent = 53, .chip = &stm32_exti_h_chip_direct },
246-
{ .exti = 31, .irq_parent = 54, .chip = &stm32_exti_h_chip_direct },
247-
{ .exti = 32, .irq_parent = 83, .chip = &stm32_exti_h_chip_direct },
248-
{ .exti = 33, .irq_parent = 84, .chip = &stm32_exti_h_chip_direct },
249-
{ .exti = 44, .irq_parent = 96, .chip = &stm32_exti_h_chip_direct },
250-
{ .exti = 47, .irq_parent = 92, .chip = &stm32_exti_h_chip_direct },
251-
{ .exti = 48, .irq_parent = 116, .chip = &stm32_exti_h_chip_direct },
252-
{ .exti = 50, .irq_parent = 117, .chip = &stm32_exti_h_chip_direct },
253-
{ .exti = 52, .irq_parent = 118, .chip = &stm32_exti_h_chip_direct },
254-
{ .exti = 53, .irq_parent = 119, .chip = &stm32_exti_h_chip_direct },
255-
{ .exti = 68, .irq_parent = 63, .chip = &stm32_exti_h_chip_direct },
256-
{ .exti = 70, .irq_parent = 98, .chip = &stm32_exti_h_chip_direct },
225+
{ .exti = 0, .irq_parent = 6 },
226+
{ .exti = 1, .irq_parent = 7 },
227+
{ .exti = 2, .irq_parent = 8 },
228+
{ .exti = 3, .irq_parent = 9 },
229+
{ .exti = 4, .irq_parent = 10 },
230+
{ .exti = 5, .irq_parent = 24 },
231+
{ .exti = 6, .irq_parent = 65 },
232+
{ .exti = 7, .irq_parent = 66 },
233+
{ .exti = 8, .irq_parent = 67 },
234+
{ .exti = 9, .irq_parent = 68 },
235+
{ .exti = 10, .irq_parent = 41 },
236+
{ .exti = 11, .irq_parent = 43 },
237+
{ .exti = 12, .irq_parent = 77 },
238+
{ .exti = 13, .irq_parent = 78 },
239+
{ .exti = 14, .irq_parent = 106 },
240+
{ .exti = 15, .irq_parent = 109 },
241+
{ .exti = 16, .irq_parent = 1 },
242+
{ .exti = 19, .irq_parent = 3 },
243+
{ .exti = 21, .irq_parent = 32 },
244+
{ .exti = 22, .irq_parent = 34 },
245+
{ .exti = 23, .irq_parent = 73 },
246+
{ .exti = 24, .irq_parent = 93 },
247+
{ .exti = 25, .irq_parent = 114 },
248+
{ .exti = 26, .irq_parent = 38 },
249+
{ .exti = 27, .irq_parent = 39 },
250+
{ .exti = 28, .irq_parent = 40 },
251+
{ .exti = 29, .irq_parent = 72 },
252+
{ .exti = 30, .irq_parent = 53 },
253+
{ .exti = 31, .irq_parent = 54 },
254+
{ .exti = 32, .irq_parent = 83 },
255+
{ .exti = 33, .irq_parent = 84 },
256+
{ .exti = 44, .irq_parent = 96 },
257+
{ .exti = 47, .irq_parent = 92 },
258+
{ .exti = 48, .irq_parent = 116 },
259+
{ .exti = 50, .irq_parent = 117 },
260+
{ .exti = 52, .irq_parent = 118 },
261+
{ .exti = 53, .irq_parent = 119 },
262+
{ .exti = 68, .irq_parent = 63 },
263+
{ .exti = 70, .irq_parent = 98 },
257264
};
258265

259266
static const struct stm32_exti_drv_data stm32mp1_drv_data = {
@@ -711,6 +718,8 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
711718
struct irq_fwspec p_fwspec;
712719
irq_hw_number_t hwirq;
713720
int bank;
721+
u32 event_trg;
722+
struct irq_chip *chip;
714723

715724
hwirq = fwspec->param[0];
716725
if (hwirq >= host_data->drv_data->bank_nr * IRQS_PER_BANK)
@@ -724,8 +733,11 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
724733
if (!desc)
725734
return -EINVAL;
726735

727-
irq_domain_set_hwirq_and_chip(dm, virq, hwirq, desc->chip,
728-
chip_data);
736+
event_trg = readl_relaxed(host_data->base + chip_data->reg_bank->trg_ofst);
737+
chip = (event_trg & BIT(hwirq % IRQS_PER_BANK)) ?
738+
&stm32_exti_h_chip : &stm32_exti_h_chip_direct;
739+
740+
irq_domain_set_hwirq_and_chip(dm, virq, hwirq, chip, chip_data);
729741
if (desc->irq_parent) {
730742
p_fwspec.fwnode = dm->parent->fwnode;
731743
p_fwspec.param_count = 3;

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