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linuswlinusw
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Merge tag 'intel-gpio-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel
intel-gpio for v5.9-1 * Move GPIO PMIC drivers to use IRQ chip template * Introduce for_each_requested_gpio() and convert existing users * Replace unsigned by unsigned int in few drivers * Fix an issue in kernel doc that validator complains about * Move to verbose debug level the IRQ status message in gpio-pch The following is an automated git shortlog grouped by driver: ARM/orion/gpio: - Make use of for_each_requested_gpio() crystalcove: - Use irqchip template - changed every 'unsigned' to 'unsigned int' gpiolib: - Introduce for_each_requested_gpio_in_range() macro gpio-ml-ioh: - Fix missing ':' in 'struct ioh_gpio_reg_data ich: - changed every 'unsigned' to 'unsigned int' mvebu: - Make use of for_each_requested_gpio() pch: - Add a blank line between declaration and code - changed every 'unsigned' to 'unsigned int' - Move IRQ status message to verbose debug level pinctrl: - at91: Make use of for_each_requested_gpio() sch: - Add a blank line between declaration and code - changed every 'unsigned' to 'unsigned int' wcove: - Use irqchip template xra1403: - Make use of for_each_requested_gpio()
2 parents edee3bc + 4941b8d commit ce8672c

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6 files changed

+70
-59
lines changed

6 files changed

+70
-59
lines changed

‎drivers/gpio/gpio-crystalcove.c

Lines changed: 20 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio)
129129
regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, cg->intcnt_value);
130130
}
131131

132-
static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
132+
static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned int gpio)
133133
{
134134
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
135135
int reg = to_reg(gpio, CTRL_OUT);
@@ -140,7 +140,7 @@ static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
140140
return regmap_write(cg->regmap, reg, CTLO_INPUT_SET);
141141
}
142142

143-
static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,
143+
static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned int gpio,
144144
int value)
145145
{
146146
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
@@ -152,7 +152,7 @@ static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,
152152
return regmap_write(cg->regmap, reg, CTLO_OUTPUT_SET | value);
153153
}
154154

155-
static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)
155+
static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned int gpio)
156156
{
157157
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
158158
unsigned int val;
@@ -169,7 +169,7 @@ static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)
169169
}
170170

171171
static void crystalcove_gpio_set(struct gpio_chip *chip,
172-
unsigned gpio, int value)
172+
unsigned int gpio, int value)
173173
{
174174
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
175175
int reg = to_reg(gpio, CTRL_OUT);
@@ -183,7 +183,7 @@ static void crystalcove_gpio_set(struct gpio_chip *chip,
183183
regmap_update_bits(cg->regmap, reg, 1, 0);
184184
}
185185

186-
static int crystalcove_irq_type(struct irq_data *data, unsigned type)
186+
static int crystalcove_irq_type(struct irq_data *data, unsigned int type)
187187
{
188188
struct crystalcove_gpio *cg =
189189
gpiochip_get_data(irq_data_get_irq_chip_data(data));
@@ -330,6 +330,7 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
330330
int retval;
331331
struct device *dev = pdev->dev.parent;
332332
struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
333+
struct gpio_irq_chip *girq;
333334

334335
if (irq < 0)
335336
return irq;
@@ -353,14 +354,15 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
353354
cg->chip.dbg_show = crystalcove_gpio_dbg_show;
354355
cg->regmap = pmic->regmap;
355356

356-
retval = devm_gpiochip_add_data(&pdev->dev, &cg->chip, cg);
357-
if (retval) {
358-
dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
359-
return retval;
360-
}
361-
362-
gpiochip_irqchip_add_nested(&cg->chip, &crystalcove_irqchip, 0,
363-
handle_simple_irq, IRQ_TYPE_NONE);
357+
girq = &cg->chip.irq;
358+
girq->chip = &crystalcove_irqchip;
359+
/* This will let us handle the parent IRQ in the driver */
360+
girq->parent_handler = NULL;
361+
girq->num_parents = 0;
362+
girq->parents = NULL;
363+
girq->default_type = IRQ_TYPE_NONE;
364+
girq->handler = handle_simple_irq;
365+
girq->threaded = true;
364366

365367
retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
366368
IRQF_ONESHOT, KBUILD_MODNAME, cg);
@@ -370,7 +372,11 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
370372
return retval;
371373
}
372374

373-
gpiochip_set_nested_irqchip(&cg->chip, &crystalcove_irqchip, irq);
375+
retval = devm_gpiochip_add_data(&pdev->dev, &cg->chip, cg);
376+
if (retval) {
377+
dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
378+
return retval;
379+
}
374380

375381
return 0;
376382
}

‎drivers/gpio/gpio-ich.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -74,8 +74,8 @@ struct ichx_desc {
7474
u32 use_sel_ignore[3];
7575

7676
/* Some chipsets have quirks, let these use their own request/get */
77-
int (*request)(struct gpio_chip *chip, unsigned offset);
78-
int (*get)(struct gpio_chip *chip, unsigned offset);
77+
int (*request)(struct gpio_chip *chip, unsigned int offset);
78+
int (*get)(struct gpio_chip *chip, unsigned int offset);
7979

8080
/*
8181
* Some chipsets don't let reading output values on GPIO_LVL register
@@ -100,7 +100,7 @@ static int modparam_gpiobase = -1; /* dynamic */
100100
module_param_named(gpiobase, modparam_gpiobase, int, 0444);
101101
MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, which is the default.");
102102

103-
static int ichx_write_bit(int reg, unsigned nr, int val, int verify)
103+
static int ichx_write_bit(int reg, unsigned int nr, int val, int verify)
104104
{
105105
unsigned long flags;
106106
u32 data, tmp;
@@ -132,7 +132,7 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify)
132132
return (verify && data != tmp) ? -EPERM : 0;
133133
}
134134

135-
static int ichx_read_bit(int reg, unsigned nr)
135+
static int ichx_read_bit(int reg, unsigned int nr)
136136
{
137137
unsigned long flags;
138138
u32 data;
@@ -152,20 +152,20 @@ static int ichx_read_bit(int reg, unsigned nr)
152152
return !!(data & BIT(bit));
153153
}
154154

155-
static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr)
155+
static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned int nr)
156156
{
157157
return !!(ichx_priv.use_gpio & BIT(nr / 32));
158158
}
159159

160-
static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr)
160+
static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned int nr)
161161
{
162162
if (ichx_read_bit(GPIO_IO_SEL, nr))
163163
return GPIO_LINE_DIRECTION_IN;
164164

165165
return GPIO_LINE_DIRECTION_OUT;
166166
}
167167

168-
static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
168+
static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned int nr)
169169
{
170170
/*
171171
* Try setting pin as an input and verify it worked since many pins
@@ -174,7 +174,7 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
174174
return ichx_write_bit(GPIO_IO_SEL, nr, 1, 1);
175175
}
176176

177-
static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
177+
static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned int nr,
178178
int val)
179179
{
180180
/* Disable blink hardware which is available for GPIOs from 0 to 31. */
@@ -191,12 +191,12 @@ static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
191191
return ichx_write_bit(GPIO_IO_SEL, nr, 0, 1);
192192
}
193193

194-
static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr)
194+
static int ichx_gpio_get(struct gpio_chip *chip, unsigned int nr)
195195
{
196196
return ichx_read_bit(GPIO_LVL, nr);
197197
}
198198

199-
static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
199+
static int ich6_gpio_get(struct gpio_chip *chip, unsigned int nr)
200200
{
201201
unsigned long flags;
202202
u32 data;
@@ -223,7 +223,7 @@ static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
223223
}
224224
}
225225

226-
static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)
226+
static int ichx_gpio_request(struct gpio_chip *chip, unsigned int nr)
227227
{
228228
if (!ichx_gpio_check_available(chip, nr))
229229
return -ENXIO;
@@ -240,7 +240,7 @@ static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)
240240
return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;
241241
}
242242

243-
static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr)
243+
static int ich6_gpio_request(struct gpio_chip *chip, unsigned int nr)
244244
{
245245
/*
246246
* Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100
@@ -254,7 +254,7 @@ static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr)
254254
return ichx_gpio_request(chip, nr);
255255
}
256256

257-
static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
257+
static void ichx_gpio_set(struct gpio_chip *chip, unsigned int nr, int val)
258258
{
259259
ichx_write_bit(GPIO_LVL, nr, val, 0);
260260
}

‎drivers/gpio/gpio-ml-ioh.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ struct ioh_regs {
4444

4545
/**
4646
* struct ioh_gpio_reg_data - The register store data.
47-
* @ien_reg To store contents of interrupt enable register.
47+
* @ien_reg: To store contents of interrupt enable register.
4848
* @imask_reg: To store contents of interrupt mask regist
4949
* @po_reg: To store contents of PO register.
5050
* @pm_reg: To store contents of PM register.

‎drivers/gpio/gpio-pch.c

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ struct pch_gpio {
9595
spinlock_t spinlock;
9696
};
9797

98-
static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
98+
static void pch_gpio_set(struct gpio_chip *gpio, unsigned int nr, int val)
9999
{
100100
u32 reg_val;
101101
struct pch_gpio *chip = gpiochip_get_data(gpio);
@@ -112,14 +112,14 @@ static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
112112
spin_unlock_irqrestore(&chip->spinlock, flags);
113113
}
114114

115-
static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr)
115+
static int pch_gpio_get(struct gpio_chip *gpio, unsigned int nr)
116116
{
117117
struct pch_gpio *chip = gpiochip_get_data(gpio);
118118

119119
return !!(ioread32(&chip->reg->pi) & BIT(nr));
120120
}
121121

122-
static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
122+
static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned int nr,
123123
int val)
124124
{
125125
struct pch_gpio *chip = gpiochip_get_data(gpio);
@@ -146,7 +146,7 @@ static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
146146
return 0;
147147
}
148148

149-
static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
149+
static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned int nr)
150150
{
151151
struct pch_gpio *chip = gpiochip_get_data(gpio);
152152
u32 pm;
@@ -196,9 +196,10 @@ static void __maybe_unused pch_gpio_restore_reg_conf(struct pch_gpio *chip)
196196
iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, &chip->reg->gpio_use_sel);
197197
}
198198

199-
static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
199+
static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned int offset)
200200
{
201201
struct pch_gpio *chip = gpiochip_get_data(gpio);
202+
202203
return chip->irq_base + offset;
203204
}
204205

@@ -304,9 +305,10 @@ static irqreturn_t pch_gpio_handler(int irq, void *dev_id)
304305
unsigned long reg_val = ioread32(&chip->reg->istatus);
305306
int i;
306307

307-
dev_dbg(chip->dev, "irq=%d status=0x%lx\n", irq, reg_val);
308+
dev_vdbg(chip->dev, "irq=%d status=0x%lx\n", irq, reg_val);
308309

309310
reg_val &= BIT(gpio_pins[chip->ioh]) - 1;
311+
310312
for_each_set_bit(i, &reg_val, gpio_pins[chip->ioh])
311313
generic_handle_irq(chip->irq_base + i);
312314

‎drivers/gpio/gpio-sch.c

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,10 @@ struct sch_gpio {
2626
unsigned short resume_base;
2727
};
2828

29-
static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio,
30-
unsigned reg)
29+
static unsigned int sch_gpio_offset(struct sch_gpio *sch, unsigned int gpio,
30+
unsigned int reg)
3131
{
32-
unsigned base = 0;
32+
unsigned int base = 0;
3333

3434
if (gpio >= sch->resume_base) {
3535
gpio -= sch->resume_base;
@@ -39,14 +39,14 @@ static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio,
3939
return base + reg + gpio / 8;
4040
}
4141

42-
static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio)
42+
static unsigned int sch_gpio_bit(struct sch_gpio *sch, unsigned int gpio)
4343
{
4444
if (gpio >= sch->resume_base)
4545
gpio -= sch->resume_base;
4646
return gpio % 8;
4747
}
4848

49-
static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned gpio, unsigned reg)
49+
static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned int gpio, unsigned int reg)
5050
{
5151
unsigned short offset, bit;
5252
u8 reg_val;
@@ -59,7 +59,7 @@ static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned gpio, unsigned reg)
5959
return reg_val;
6060
}
6161

62-
static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned gpio, unsigned reg,
62+
static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned int gpio, unsigned int reg,
6363
int val)
6464
{
6565
unsigned short offset, bit;
@@ -76,7 +76,7 @@ static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned gpio, unsigned reg,
7676
outb((reg_val & ~BIT(bit)), sch->iobase + offset);
7777
}
7878

79-
static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
79+
static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num)
8080
{
8181
struct sch_gpio *sch = gpiochip_get_data(gc);
8282

@@ -86,13 +86,14 @@ static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
8686
return 0;
8787
}
8888

89-
static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
89+
static int sch_gpio_get(struct gpio_chip *gc, unsigned int gpio_num)
9090
{
9191
struct sch_gpio *sch = gpiochip_get_data(gc);
92+
9293
return sch_gpio_reg_get(sch, gpio_num, GLV);
9394
}
9495

95-
static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
96+
static void sch_gpio_set(struct gpio_chip *gc, unsigned int gpio_num, int val)
9697
{
9798
struct sch_gpio *sch = gpiochip_get_data(gc);
9899

@@ -101,7 +102,7 @@ static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
101102
spin_unlock(&sch->lock);
102103
}
103104

104-
static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num,
105+
static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned int gpio_num,
105106
int val)
106107
{
107108
struct sch_gpio *sch = gpiochip_get_data(gc);
@@ -123,7 +124,7 @@ static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num,
123124
return 0;
124125
}
125126

126-
static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned gpio_num)
127+
static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio_num)
127128
{
128129
struct sch_gpio *sch = gpiochip_get_data(gc);
129130

‎drivers/gpio/gpio-wcove.c

Lines changed: 16 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -400,6 +400,7 @@ static int wcove_gpio_probe(struct platform_device *pdev)
400400
struct wcove_gpio *wg;
401401
int virq, ret, irq;
402402
struct device *dev;
403+
struct gpio_irq_chip *girq;
403404

404405
/*
405406
* This gpio platform device is created by a mfd device (see
@@ -442,19 +443,6 @@ static int wcove_gpio_probe(struct platform_device *pdev)
442443
wg->dev = dev;
443444
wg->regmap = pmic->regmap;
444445

445-
ret = devm_gpiochip_add_data(dev, &wg->chip, wg);
446-
if (ret) {
447-
dev_err(dev, "Failed to add gpiochip: %d\n", ret);
448-
return ret;
449-
}
450-
451-
ret = gpiochip_irqchip_add_nested(&wg->chip, &wcove_irqchip, 0,
452-
handle_simple_irq, IRQ_TYPE_NONE);
453-
if (ret) {
454-
dev_err(dev, "Failed to add irqchip: %d\n", ret);
455-
return ret;
456-
}
457-
458446
virq = regmap_irq_get_virq(wg->regmap_irq_chip, irq);
459447
if (virq < 0) {
460448
dev_err(dev, "Failed to get virq by irq %d\n", irq);
@@ -468,7 +456,21 @@ static int wcove_gpio_probe(struct platform_device *pdev)
468456
return ret;
469457
}
470458

471-
gpiochip_set_nested_irqchip(&wg->chip, &wcove_irqchip, virq);
459+
girq = &wg->chip.irq;
460+
girq->chip = &wcove_irqchip;
461+
/* This will let us handle the parent IRQ in the driver */
462+
girq->parent_handler = NULL;
463+
girq->num_parents = 0;
464+
girq->parents = NULL;
465+
girq->default_type = IRQ_TYPE_NONE;
466+
girq->handler = handle_simple_irq;
467+
girq->threaded = true;
468+
469+
ret = devm_gpiochip_add_data(dev, &wg->chip, wg);
470+
if (ret) {
471+
dev_err(dev, "Failed to add gpiochip: %d\n", ret);
472+
return ret;
473+
}
472474

473475
/* Enable GPIO0 interrupts */
474476
ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE, GPIO_IRQ0_MASK,

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