Skip to content

Commit cf8182f

Browse files
arndbarndb
committed
Merge tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC DT updates for v5.9 - Add platforms chipid nodes for am65x and j721e - Update latest data sheet values for MMC on am65x - Add serdes and usb3 support for j721e - Add analog audio support for j721e - Add SD card support for am65x - Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e - HTTP links replaced with HTTPS ones * tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0 arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller arm64: dts: ti: k3-j721e-main: rename smmu node to iommu arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones arm64: dts: ti: k3-am654-base-board: Add support for SD card arm64: dts: ti: k3-am65-main: Add support for sdhci1 arm64: dts: ti: j721e-common-proc-board: Analog audio support arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default arm64: dts: ti: k3-am654-main: Update otap-del-sel values arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 0183b9b + 04fe647 commit cf8182f

File tree

15 files changed

+651
-21
lines changed

15 files changed

+651
-21
lines changed

‎Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml

Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,74 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3+
%YAML 1.2
4+
---
5+
$id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#
6+
$schema: http://devicetree.org/meta-schemas/core.yaml#
7+
8+
title: TI J721e System Controller Registers R/W Device Tree Bindings
9+
10+
description: |
11+
This represents the Control Module registers (CTRL_MMR0) on the SoC.
12+
System controller node represents a register region containing a set
13+
of miscellaneous registers. The registers are not cohesive enough to
14+
represent as any specific type of device. The typical use-case is
15+
for some other node's driver, or platform-specific code, to acquire
16+
a reference to the syscon node (e.g. by phandle, node path, or
17+
search using a specific compatible value), interrogate the node (or
18+
associated OS driver) to determine the location of the registers,
19+
and access the registers directly.
20+
21+
maintainers:
22+
- Kishon Vijay Abraham I <[email protected]>
23+
- Roger Quadros <[email protected]
24+
25+
properties:
26+
compatible:
27+
anyOf:
28+
- items:
29+
- enum:
30+
- ti,j721e-system-controller
31+
- const: syscon
32+
- const: simple-mfd
33+
34+
"#address-cells":
35+
const: 1
36+
37+
"#size-cells":
38+
const: 1
39+
40+
ranges: true
41+
42+
# Optional children
43+
44+
"^serdes-ln-ctrl@[0-9a-f]+$":
45+
type: object
46+
description: |
47+
This is the SERDES lane control mux. It should follow the bindings
48+
specified in
49+
Documentation/devicetree/bindings/mux/reg-mux.txt
50+
51+
required:
52+
- compatible
53+
- reg
54+
- "#address-cells"
55+
- "#size-cells"
56+
- ranges
57+
58+
unevaluatedProperties: false
59+
60+
examples:
61+
- |
62+
scm_conf: scm-conf@100000 {
63+
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
64+
reg = <0x00100000 0x1c000>;
65+
#address-cells = <1>;
66+
#size-cells = <1>;
67+
ranges;
68+
69+
serdes_ln_ctrl: serdes-ln-ctrl@4080 {
70+
compatible = "mmio-mux";
71+
reg = <0x00004080 0x50>;
72+
};
73+
};
74+
...

‎arch/arm64/boot/dts/ti/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
# Make file to build device tree binaries for boards based on
44
# Texas Instruments Inc processors
55
#
6-
# Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
6+
# Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
77
#
88

99
dtb-$(CONFIG_ARCH_K3_AM6_SOC) += k3-am654-base-board.dtb

‎arch/arm64/boot/dts/ti/k3-am65-main.dtsi

Lines changed: 36 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* Device Tree Source for AM6 SoC Family Main Domain peripherals
44
*
5-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
5+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
66
*/
77
#include <dt-bindings/phy/phy-am654-serdes.h>
88

@@ -42,7 +42,7 @@
4242
*/
4343
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
4444

45-
gic_its: gic-its@1820000 {
45+
gic_its: msi-controller@1820000 {
4646
compatible = "arm,gic-v3-its";
4747
reg = <0x00 0x01820000 0x00 0x10000>;
4848
socionext,synquacer-pre-its = <0x1000000 0x400000>;
@@ -244,9 +244,43 @@
244244
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
245245
mmc-ddr-1_8v;
246246
mmc-hs200-1_8v;
247+
ti,otap-del-sel-legacy = <0x0>;
248+
ti,otap-del-sel-mmc-hs = <0x0>;
249+
ti,otap-del-sel-sd-hs = <0x0>;
250+
ti,otap-del-sel-sdr12 = <0x0>;
251+
ti,otap-del-sel-sdr25 = <0x0>;
252+
ti,otap-del-sel-sdr50 = <0x8>;
253+
ti,otap-del-sel-sdr104 = <0x7>;
254+
ti,otap-del-sel-ddr50 = <0x5>;
255+
ti,otap-del-sel-ddr52 = <0x5>;
256+
ti,otap-del-sel-hs200 = <0x5>;
257+
ti,otap-del-sel-hs400 = <0x0>;
258+
ti,trm-icp = <0x8>;
259+
dma-coherent;
260+
};
261+
262+
sdhci1: sdhci@4fa0000 {
263+
compatible = "ti,am654-sdhci-5.1";
264+
reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>;
265+
power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
266+
clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
267+
clock-names = "clk_ahb", "clk_xin";
268+
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
269+
ti,otap-del-sel-legacy = <0x0>;
270+
ti,otap-del-sel-mmc-hs = <0x0>;
271+
ti,otap-del-sel-sd-hs = <0x0>;
272+
ti,otap-del-sel-sdr12 = <0x0>;
273+
ti,otap-del-sel-sdr25 = <0x0>;
274+
ti,otap-del-sel-sdr50 = <0x8>;
275+
ti,otap-del-sel-sdr104 = <0x7>;
276+
ti,otap-del-sel-ddr50 = <0x4>;
277+
ti,otap-del-sel-ddr52 = <0x4>;
278+
ti,otap-del-sel-hs200 = <0x7>;
279+
ti,clkbuf-sel = <0x7>;
247280
ti,otap-del-sel = <0x2>;
248281
ti,trm-icp = <0x8>;
249282
dma-coherent;
283+
no-1-8-v;
250284
};
251285

252286
scm_conf: scm_conf@100000 {

‎arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* Device Tree Source for AM6 SoC Family MCU Domain peripherals
44
*
5-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
5+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
66
*/
77

88
&cbass_mcu {

‎arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
44
*
5-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
5+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
66
*/
77

88
&cbass_wakeup {
@@ -34,6 +34,11 @@
3434
};
3535
};
3636

37+
chipid@43000014 {
38+
compatible = "ti,am654-chipid";
39+
reg = <0x43000014 0x4>;
40+
};
41+
3742
wkup_pmx0: pinmux@4301c000 {
3843
compatible = "pinctrl-single";
3944
reg = <0x4301c000 0x118>;

‎arch/arm64/boot/dts/ti/k3-am65.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* Device Tree Source for AM6 SoC Family
44
*
5-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
5+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
66
*/
77

88
#include <dt-bindings/gpio/gpio.h>

‎arch/arm64/boot/dts/ti/k3-am654-base-board.dts

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
3+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
44
*/
55

66
/dts-v1/;
@@ -167,6 +167,19 @@
167167
>;
168168
};
169169

170+
main_mmc1_pins_default: main_mmc1_pins_default {
171+
pinctrl-single,pins = <
172+
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
173+
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
174+
AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
175+
AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
176+
AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
177+
AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
178+
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
179+
AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
180+
>;
181+
};
182+
170183
usb1_pins_default: usb1_pins_default {
171184
pinctrl-single,pins = <
172185
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
@@ -300,6 +313,18 @@
300313
disable-wp;
301314
};
302315

316+
/*
317+
* Because of erratas i2025 and i2026 for silicon revision 1.0, the
318+
* SD card interface might fail. Boards with sr1.0 are recommended to
319+
* disable sdhci1
320+
*/
321+
&sdhci1 {
322+
pinctrl-names = "default";
323+
pinctrl-0 = <&main_mmc1_pins_default>;
324+
ti,driver-strength-ohm = <50>;
325+
disable-wp;
326+
};
327+
303328
&dwc3_1 {
304329
status = "okay";
305330
};

‎arch/arm64/boot/dts/ti/k3-am654.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* Device Tree Source for AM6 SoC family in Quad core configuration
44
*
5-
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
5+
* Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
66
*/
77

88
#include "k3-am65.dtsi"

0 commit comments

Comments
 (0)