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arm64: cpufeature: add pointer auth meta-capabilities
To enable pointer auth for the kernel, we're going to need to check for the presence of address auth and generic auth using alternative_if. We currently have two cpucaps for each, but alternative_if needs to check a single cpucap. So define meta-capabilities that are present when either of the current two capabilities is present. Leave the existing four cpucaps in place, as they are still needed to check for mismatched systems where one CPU has the architected algorithm but another has the IMP DEF algorithm. Note, the meta-capabilities were present before but were removed in commit a56005d ("arm64: cpufeature: Reduce number of pointer auth CPU caps from 6 to 4") and commit 1e013d0 ("arm64: cpufeature: Rework ptr auth hwcaps using multi_entry_cap_matches"), as they were not needed then. Note, unlike before, the current patch checks the cpucap values directly, instead of reading the CPU ID register value. Reviewed-by: Suzuki K Poulose <[email protected]> Reviewed-by: Kees Cook <[email protected]> Reviewed-by: Vincenzo Frascino <[email protected]> Signed-off-by: Kristina Martsenko <[email protected]> [Amit: commit message and macro rebase, use __system_matches_cap] Signed-off-by: Amit Daniel Kachhap <[email protected]> Signed-off-by: Catalin Marinas <[email protected]>
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3 files changed

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lines changed

arch/arm64/include/asm/cpucaps.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,9 @@
5858
#define ARM64_WORKAROUND_SPECULATIVE_AT_NVHE 48
5959
#define ARM64_HAS_E0PD 49
6060
#define ARM64_HAS_RNG 50
61+
#define ARM64_HAS_ADDRESS_AUTH 51
62+
#define ARM64_HAS_GENERIC_AUTH 52
6163

62-
#define ARM64_NCAPS 51
64+
#define ARM64_NCAPS 53
6365

6466
#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/cpufeature.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -590,15 +590,13 @@ static inline bool system_supports_cnp(void)
590590
static inline bool system_supports_address_auth(void)
591591
{
592592
return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
593-
(cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
594-
cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF));
593+
cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH);
595594
}
596595

597596
static inline bool system_supports_generic_auth(void)
598597
{
599598
return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
600-
(cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
601-
cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF));
599+
cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH);
602600
}
603601

604602
static inline bool system_uses_irq_prio_masking(void)

arch/arm64/kernel/cpufeature.c

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1323,6 +1323,20 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap)
13231323
sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_ENIA | SCTLR_ELx_ENIB |
13241324
SCTLR_ELx_ENDA | SCTLR_ELx_ENDB);
13251325
}
1326+
1327+
static bool has_address_auth(const struct arm64_cpu_capabilities *entry,
1328+
int __unused)
1329+
{
1330+
return __system_matches_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
1331+
__system_matches_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF);
1332+
}
1333+
1334+
static bool has_generic_auth(const struct arm64_cpu_capabilities *entry,
1335+
int __unused)
1336+
{
1337+
return __system_matches_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
1338+
__system_matches_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF);
1339+
}
13261340
#endif /* CONFIG_ARM64_PTR_AUTH */
13271341

13281342
#ifdef CONFIG_ARM64_E0PD
@@ -1600,7 +1614,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
16001614
.field_pos = ID_AA64ISAR1_APA_SHIFT,
16011615
.min_field_value = ID_AA64ISAR1_APA_ARCHITECTED,
16021616
.matches = has_cpuid_feature,
1603-
.cpu_enable = cpu_enable_address_auth,
16041617
},
16051618
{
16061619
.desc = "Address authentication (IMP DEF algorithm)",
@@ -1611,6 +1624,11 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
16111624
.field_pos = ID_AA64ISAR1_API_SHIFT,
16121625
.min_field_value = ID_AA64ISAR1_API_IMP_DEF,
16131626
.matches = has_cpuid_feature,
1627+
},
1628+
{
1629+
.capability = ARM64_HAS_ADDRESS_AUTH,
1630+
.type = ARM64_CPUCAP_SYSTEM_FEATURE,
1631+
.matches = has_address_auth,
16141632
.cpu_enable = cpu_enable_address_auth,
16151633
},
16161634
{
@@ -1633,6 +1651,11 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
16331651
.min_field_value = ID_AA64ISAR1_GPI_IMP_DEF,
16341652
.matches = has_cpuid_feature,
16351653
},
1654+
{
1655+
.capability = ARM64_HAS_GENERIC_AUTH,
1656+
.type = ARM64_CPUCAP_SYSTEM_FEATURE,
1657+
.matches = has_generic_auth,
1658+
},
16361659
#endif /* CONFIG_ARM64_PTR_AUTH */
16371660
#ifdef CONFIG_ARM64_PSEUDO_NMI
16381661
{

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