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Merge tag 'ti-k3-soc-for-v5.6-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC family changes for 5.6, part 2. - Add DMA nodes for am65x and j721e - Add McASP nodes for am65x and j721e, showcasing the DMA usage - Add CAL node for am65x - Add OV5640 camera support for am65x * tag 'ti-k3-soc-for-v5.6-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera arm64: dts: ti: k3-am65-main Add CAL node arm64: dts: ti: k3-j721e-main: Add McASP nodes arm64: dts: ti: k3-am654-main: Add McASP nodes arm64: dts: ti: k3-j721e: DMA support arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS arm64: dts: ti: k3-am65: DMA support arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss arm64: dts: ti: k3-am65-main: Correct main NAVSS representation Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
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‎arch/arm64/boot/dts/ti/k3-am65-main.dtsi

Lines changed: 131 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -51,17 +51,6 @@
5151
};
5252
};
5353

54-
secure_proxy_main: mailbox@32c00000 {
55-
compatible = "ti,am654-secure-proxy";
56-
#mbox-cells = <1>;
57-
reg-names = "target_data", "rt", "scfg";
58-
reg = <0x00 0x32c00000 0x00 0x100000>,
59-
<0x00 0x32400000 0x00 0x100000>,
60-
<0x00 0x32800000 0x00 0x100000>;
61-
interrupt-names = "rx_011";
62-
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
63-
};
64-
6554
serdes0: serdes@900000 {
6655
compatible = "ti,phy-am654-serdes";
6756
reg = <0x0 0x900000 0x0 0x2000>;
@@ -385,11 +374,15 @@
385374
ti,sci-rm-range-girq = <0x1>;
386375
};
387376

388-
cbass_main_navss: interconnect0 {
389-
compatible = "simple-bus";
377+
main_navss {
378+
compatible = "simple-mfd";
390379
#address-cells = <2>;
391380
#size-cells = <2>;
392381
ranges;
382+
dma-coherent;
383+
dma-ranges;
384+
385+
ti,sci-dev-id = <118>;
393386

394387
intr_main_navss: interrupt-controller1 {
395388
compatible = "ti,sci-intr";
@@ -414,6 +407,17 @@
414407
ti,sci-rm-range-global-event = <0x1>;
415408
};
416409

410+
secure_proxy_main: mailbox@32c00000 {
411+
compatible = "ti,am654-secure-proxy";
412+
#mbox-cells = <1>;
413+
reg-names = "target_data", "rt", "scfg";
414+
reg = <0x00 0x32c00000 0x00 0x100000>,
415+
<0x00 0x32400000 0x00 0x100000>,
416+
<0x00 0x32800000 0x00 0x100000>;
417+
interrupt-names = "rx_011";
418+
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
419+
};
420+
417421
hwspinlock: spinlock@30e00000 {
418422
compatible = "ti,am654-hwspinlock";
419423
reg = <0x00 0x30e00000 0x00 0x1000>;
@@ -527,6 +531,41 @@
527531
ti,mbox-num-fifos = <16>;
528532
interrupt-parent = <&intr_main_navss>;
529533
};
534+
535+
ringacc: ringacc@3c000000 {
536+
compatible = "ti,am654-navss-ringacc";
537+
reg = <0x0 0x3c000000 0x0 0x400000>,
538+
<0x0 0x38000000 0x0 0x400000>,
539+
<0x0 0x31120000 0x0 0x100>,
540+
<0x0 0x33000000 0x0 0x40000>;
541+
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
542+
ti,num-rings = <818>;
543+
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
544+
ti,dma-ring-reset-quirk;
545+
ti,sci = <&dmsc>;
546+
ti,sci-dev-id = <187>;
547+
msi-parent = <&inta_main_udmass>;
548+
};
549+
550+
main_udmap: dma-controller@31150000 {
551+
compatible = "ti,am654-navss-main-udmap";
552+
reg = <0x0 0x31150000 0x0 0x100>,
553+
<0x0 0x34000000 0x0 0x100000>,
554+
<0x0 0x35000000 0x0 0x100000>;
555+
reg-names = "gcfg", "rchanrt", "tchanrt";
556+
msi-parent = <&inta_main_udmass>;
557+
#dma-cells = <1>;
558+
559+
ti,sci = <&dmsc>;
560+
ti,sci-dev-id = <188>;
561+
ti,ringacc = <&ringacc>;
562+
563+
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
564+
<0x2>; /* TX_CHAN */
565+
ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
566+
<0x5>; /* RX_CHAN */
567+
ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
568+
};
530569
};
531570

532571
main_gpio0: main_gpio0@600000 {
@@ -624,4 +663,83 @@
624663
dma-coherent;
625664
interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
626665
};
666+
667+
mcasp0: mcasp@2b00000 {
668+
compatible = "ti,am33xx-mcasp-audio";
669+
reg = <0x0 0x02b00000 0x0 0x2000>,
670+
<0x0 0x02b08000 0x0 0x1000>;
671+
reg-names = "mpu","dat";
672+
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
673+
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
674+
interrupt-names = "tx", "rx";
675+
676+
dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
677+
dma-names = "tx", "rx";
678+
679+
clocks = <&k3_clks 104 0>;
680+
clock-names = "fck";
681+
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
682+
683+
status = "disabled";
684+
};
685+
686+
mcasp1: mcasp@2b10000 {
687+
compatible = "ti,am33xx-mcasp-audio";
688+
reg = <0x0 0x02b10000 0x0 0x2000>,
689+
<0x0 0x02b18000 0x0 0x1000>;
690+
reg-names = "mpu","dat";
691+
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
692+
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
693+
interrupt-names = "tx", "rx";
694+
695+
dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
696+
dma-names = "tx", "rx";
697+
698+
clocks = <&k3_clks 105 0>;
699+
clock-names = "fck";
700+
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
701+
702+
status = "disabled";
703+
};
704+
705+
mcasp2: mcasp@2b20000 {
706+
compatible = "ti,am33xx-mcasp-audio";
707+
reg = <0x0 0x02b20000 0x0 0x2000>,
708+
<0x0 0x02b28000 0x0 0x1000>;
709+
reg-names = "mpu","dat";
710+
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
711+
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
712+
interrupt-names = "tx", "rx";
713+
714+
dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
715+
dma-names = "tx", "rx";
716+
717+
clocks = <&k3_clks 106 0>;
718+
clock-names = "fck";
719+
power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
720+
721+
status = "disabled";
722+
};
723+
724+
cal: cal@6f03000 {
725+
compatible = "ti,am654-cal";
726+
reg = <0x0 0x06f03000 0x0 0x400>,
727+
<0x0 0x06f03800 0x0 0x40>;
728+
reg-names = "cal_top",
729+
"cal_rx_core0";
730+
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
731+
ti,camerrx-control = <&scm_conf 0x40c0>;
732+
clock-names = "fck";
733+
clocks = <&k3_clks 2 0>;
734+
power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
735+
736+
ports {
737+
#address-cells = <1>;
738+
#size-cells = <0>;
739+
740+
csi2_0: port@0 {
741+
reg = <0>;
742+
};
743+
};
744+
};
627745
};

‎arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,52 @@
104104
};
105105
};
106106

107+
mcu_navss {
108+
compatible = "simple-mfd";
109+
#address-cells = <2>;
110+
#size-cells = <2>;
111+
ranges;
112+
dma-coherent;
113+
dma-ranges;
114+
115+
ti,sci-dev-id = <119>;
116+
117+
mcu_ringacc: ringacc@2b800000 {
118+
compatible = "ti,am654-navss-ringacc";
119+
reg = <0x0 0x2b800000 0x0 0x400000>,
120+
<0x0 0x2b000000 0x0 0x400000>,
121+
<0x0 0x28590000 0x0 0x100>,
122+
<0x0 0x2a500000 0x0 0x40000>;
123+
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
124+
ti,num-rings = <286>;
125+
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
126+
ti,dma-ring-reset-quirk;
127+
ti,sci = <&dmsc>;
128+
ti,sci-dev-id = <195>;
129+
msi-parent = <&inta_main_udmass>;
130+
};
131+
132+
mcu_udmap: dma-controller@285c0000 {
133+
compatible = "ti,am654-navss-mcu-udmap";
134+
reg = <0x0 0x285c0000 0x0 0x100>,
135+
<0x0 0x2a800000 0x0 0x40000>,
136+
<0x0 0x2aa00000 0x0 0x40000>;
137+
reg-names = "gcfg", "rchanrt", "tchanrt";
138+
msi-parent = <&inta_main_udmass>;
139+
#dma-cells = <1>;
140+
141+
ti,sci = <&dmsc>;
142+
ti,sci-dev-id = <194>;
143+
ti,ringacc = <&mcu_ringacc>;
144+
145+
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
146+
<0x2>; /* TX_CHAN */
147+
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
148+
<0x4>; /* RX_CHAN */
149+
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
150+
};
151+
};
152+
107153
fss: fss@47000000 {
108154
compatible = "simple-bus";
109155
#address-cells = <2>;

‎arch/arm64/boot/dts/ti/k3-am654-base-board.dts

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,12 @@
5353
gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
5454
};
5555
};
56+
57+
clk_ov5640_fixed: clock {
58+
compatible = "fixed-clock";
59+
#clock-cells = <0>;
60+
clock-frequency = <24000000>;
61+
};
5662
};
5763

5864
&wkup_pmx0 {
@@ -213,6 +219,23 @@
213219
pinctrl-names = "default";
214220
pinctrl-0 = <&main_i2c1_pins_default>;
215221
clock-frequency = <400000>;
222+
223+
ov5640@3c {
224+
compatible = "ovti,ov5640";
225+
reg = <0x3c>;
226+
227+
clocks = <&clk_ov5640_fixed>;
228+
clock-names = "xclk";
229+
230+
port {
231+
csi2_cam0: endpoint {
232+
remote-endpoint = <&csi2_phy0>;
233+
clock-lanes = <0>;
234+
data-lanes = <1 2>;
235+
};
236+
};
237+
};
238+
216239
};
217240

218241
&main_i2c2 {
@@ -388,3 +411,11 @@
388411
#size-cells = <1>;
389412
};
390413
};
414+
415+
&csi2_0 {
416+
csi2_phy0: endpoint {
417+
remote-endpoint = <&csi2_cam0>;
418+
clock-lanes = <0>;
419+
data-lanes = <1 2>;
420+
};
421+
};

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