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Marc Zyngieroupton
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KVM: arm64: Streamline save/restore of HFG[RW]TR_EL2
The way we save/restore HFG[RW]TR_EL2 can now be simplified, and the Ampere erratum hack is the only thing that still stands out. Reviewed-by: Joey Gouly <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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arch/arm64/kvm/hyp/include/hyp/switch.h

Lines changed: 9 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,6 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
157157
{
158158
struct kvm_cpu_context *hctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
159159
struct kvm *kvm = kern_hyp_va(vcpu->kvm);
160-
u64 r_clr = 0, w_clr = 0, r_set = 0, w_set = 0;
161-
u64 r_val, w_val;
162160

163161
CHECK_FGT_MASKS(HFGRTR_EL2);
164162
CHECK_FGT_MASKS(HFGWTR_EL2);
@@ -171,34 +169,10 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
171169
if (!cpus_have_final_cap(ARM64_HAS_FGT))
172170
return;
173171

174-
ctxt_sys_reg(hctxt, HFGRTR_EL2) = read_sysreg_s(SYS_HFGRTR_EL2);
175-
ctxt_sys_reg(hctxt, HFGWTR_EL2) = read_sysreg_s(SYS_HFGWTR_EL2);
176-
177-
/*
178-
* Trap guest writes to TCR_EL1 to prevent it from enabling HA or HD.
179-
*/
180-
if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))
181-
w_set |= HFGxTR_EL2_TCR_EL1_MASK;
182-
183-
if (vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu)) {
184-
compute_clr_set(vcpu, HFGRTR_EL2, r_clr, r_set);
185-
compute_clr_set(vcpu, HFGWTR_EL2, w_clr, w_set);
186-
}
187-
188-
compute_undef_clr_set(vcpu, kvm, HFGRTR_EL2, r_clr, r_set);
189-
compute_undef_clr_set(vcpu, kvm, HFGWTR_EL2, w_clr, w_set);
190-
191-
r_val = __HFGRTR_EL2_nMASK;
192-
r_val |= r_set;
193-
r_val &= ~r_clr;
194-
195-
w_val = __HFGWTR_EL2_nMASK;
196-
w_val |= w_set;
197-
w_val &= ~w_clr;
198-
199-
write_sysreg_s(r_val, SYS_HFGRTR_EL2);
200-
write_sysreg_s(w_val, SYS_HFGWTR_EL2);
201-
172+
update_fgt_traps(hctxt, vcpu, kvm, HFGRTR_EL2);
173+
update_fgt_traps_cs(hctxt, vcpu, kvm, HFGWTR_EL2, 0,
174+
cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38) ?
175+
HFGxTR_EL2_TCR_EL1_MASK : 0);
202176
update_fgt_traps(hctxt, vcpu, kvm, HFGITR_EL2);
203177
update_fgt_traps(hctxt, vcpu, kvm, HDFGRTR_EL2);
204178
update_fgt_traps(hctxt, vcpu, kvm, HDFGWTR_EL2);
@@ -223,9 +197,11 @@ static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu)
223197
if (!cpus_have_final_cap(ARM64_HAS_FGT))
224198
return;
225199

226-
write_sysreg_s(ctxt_sys_reg(hctxt, HFGRTR_EL2), SYS_HFGRTR_EL2);
227-
write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2);
228-
200+
__deactivate_fgt(hctxt, vcpu, kvm, HFGRTR_EL2);
201+
if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))
202+
write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2);
203+
else
204+
__deactivate_fgt(hctxt, vcpu, kvm, HFGWTR_EL2);
229205
__deactivate_fgt(hctxt, vcpu, kvm, HFGITR_EL2);
230206
__deactivate_fgt(hctxt, vcpu, kvm, HDFGRTR_EL2);
231207
__deactivate_fgt(hctxt, vcpu, kvm, HDFGWTR_EL2);

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