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Sam Protsenkokrzk
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clk: samsung: Fix kernel-doc comments
Fix some issues found in kernel-doc comments in Samsung CCF framework. It makes scripts/kernel-doc happy, which can be checked with: $ find drivers/clk/samsung/ -name '*.[ch]' -exec \ scripts/kernel-doc -v -none {} \; Signed-off-by: Sam Protsenko <[email protected]> Fixes: ddeac8d ("clk: samsung: add infrastructure to register cpu clocks") Fixes: 721c42a ("clk: samsung: add common clock framework helper functions for Samsung platforms") Fixes: 3ff6e0d ("clk: samsung: Add support to register rate_table for samsung plls") Reviewed-by: Randy Dunlap <[email protected]> Tested-by: Randy Dunlap <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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drivers/clk/samsung/clk-cpu.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
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#include "clk.h"
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/**
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* struct exynos_cpuclk_data: config data to setup cpu clocks.
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* struct exynos_cpuclk_cfg_data: config data to setup cpu clocks.
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* @prate: frequency of the primary parent clock (in KHz).
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* @div0: value to be programmed in the div_cpu0 register.
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* @div1: value to be programmed in the div_cpu1 register.

drivers/clk/samsung/clk.h

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ struct samsung_clock_alias {
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* @name: name of this fixed-rate clock.
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* @parent_name: optional parent clock name.
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* @flags: optional fixed-rate clock flags.
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* @fixed-rate: fixed clock rate of this clock.
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* @fixed_rate: fixed clock rate of this clock.
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*/
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struct samsung_fixed_rate_clock {
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unsigned int id;
@@ -74,7 +74,7 @@ struct samsung_fixed_rate_clock {
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.fixed_rate = frate, \
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}
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/*
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/**
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* struct samsung_fixed_factor_clock: information about fixed-factor clock
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* @id: platform specific id of the clock.
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* @name: name of this fixed-factor clock.
@@ -146,14 +146,16 @@ struct samsung_mux_clock {
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__MUX(_id, cname, pnames, o, s, w, f, mf)
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/**
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* @id: platform specific id of the clock.
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* struct samsung_div_clock: information about div clock
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* @id: platform specific id of the clock.
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* @name: name of this div clock.
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* @parent_name: name of the parent clock.
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* @flags: optional flags for basic clock.
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* @offset: offset of the register for configuring the div.
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* @shift: starting bit location of the div control bit-field in @reg.
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* @width: width of the bitfield.
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* @div_flags: flags for div-type clock.
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* @table: array of divider/value pairs ending with a div set to 0.
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*/
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struct samsung_div_clock {
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unsigned int id;
@@ -244,6 +246,7 @@ struct samsung_clk_reg_dump {
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* @con_offset: offset of the register for configuring the PLL.
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* @lock_offset: offset of the register for locking the PLL.
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* @type: Type of PLL to be registered.
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* @rate_table: array of PLL settings for possible PLL rates.
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*/
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struct samsung_pll_clock {
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unsigned int id;

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