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dt-bindings: arm: Fixup the DT bindings for hierarchical PSCI states
The hierarchical topology with power-domain should be described through child nodes, rather than as currently described in the PSCI root node. Fix this by adding a patternProperties with a corresponding reference to the power-domain DT binding. Additionally, update the example to conform to the new pattern, but also to the adjusted domain-idle-state DT binding. Fixes: a3f048b ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson <[email protected]> [robh: Add missing allOf, tweak power-domain node name] Signed-off-by: Rob Herring <[email protected]>
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Documentation/devicetree/bindings/arm/psci.yaml

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@@ -102,11 +102,12 @@ properties:
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[1] Kernel documentation - ARM idle states bindings
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Documentation/devicetree/bindings/arm/idle-states.yaml
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"#power-domain-cells":
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description:
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The number of cells in a PM domain specifier as per binding in [3].
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Must be 0 as to represent a single PM domain.
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patternProperties:
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"^power-domain-":
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allOf:
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- $ref: "../power/power-domain.yaml#"
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type: object
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description: |
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ARM systems can have multiple cores, sometimes in an hierarchical
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arrangement. This often, but not always, maps directly to the processor
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power topology of the system. Individual nodes in a topology have their
@@ -122,15 +123,9 @@ properties:
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helps to implement support for OSI mode and OS implementations may choose
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to mandate it.
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[3] Documentation/devicetree/bindings/power/power_domain.txt
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[3] Documentation/devicetree/bindings/power/power-domain.yaml
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[4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
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power-domains:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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description:
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List of phandles and PM domain specifiers, as defined by bindings of the
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PM domain provider.
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required:
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- compatible
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- method
@@ -224,6 +219,9 @@ examples:
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exit-latency-us = <10>;
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min-residency-us = <100>;
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};
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};
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domain-idle-states {
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CLUSTER_RET: cluster-retention {
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compatible = "domain-idle-state";
@@ -247,19 +245,19 @@ examples:
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compatible = "arm,psci-1.0";
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method = "smc";
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CPU_PD0: cpu-pd0 {
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CPU_PD0: power-domain-cpu0 {
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#power-domain-cells = <0>;
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domain-idle-states = <&CPU_PWRDN>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD1: cpu-pd1 {
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CPU_PD1: power-domain-cpu1 {
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#power-domain-cells = <0>;
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domain-idle-states = <&CPU_PWRDN>;
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power-domains = <&CLUSTER_PD>;
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};
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CLUSTER_PD: cluster-pd {
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CLUSTER_PD: power-domain-cluster {
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#power-domain-cells = <0>;
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domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
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};

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