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ARM: dts: dra7-ipu-dsp-common: Add timers to IPU and DSP nodes
The BIOS System Tick timers have been added for all the IPU and DSP remoteproc devices in the DRA7 SoC family. The data is added to the two common dra7-ipu-dsp-common and dra74-ipu-dsp-common dtsi files that are included by all the desired board files. The following timers are chosen, as per the timers used on the current firmware images: IPU2: GPTimer 3 IPU1: GPTimer 11 DSP1: GPTimer 5 DSP2: GPTimer 6 The timers are optional, but are mandatory to support advanced device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, if needed. Each of the IPUs has two Cortex-M4 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi

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&ipu2 {
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mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
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ti,timers = <&timer3>;
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};
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&ipu1 {
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mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
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ti,timers = <&timer11>;
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};
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&dsp1 {
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mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
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ti,timers = <&timer5>;
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};

arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi

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&dsp2 {
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mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
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ti,timers = <&timer6>;
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};

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