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Merge tag 'drm-misc-next-2023-10-12' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v6.7-rc1: Contains the previous pull request drm-misc-next-2023-10-06 + following: Cross-subsystem Changes: - Rename fb_pgprot to pgprot_framebuffer and remove file argument/ - Update iosys-map documentation typos. Core Changes: - Assorted fixes to drm/panel. - Add HPD state to drm_connector_oob_hotplug_event(), and implement oob hotplug events in bridge connector. - Replace drm_framebuffer_plane_width/height with calls to drm_format_info_plane_width/height. Driver Changes: - Clock and debug fixes for bridge/samsung-dsim. - More btree -> maple tree conversions. - Assorted bugfixes in rockchip, panel-tpo-tpg110, - Add LTK050H3148W-CTA6 panel support. - Assorted small fixes in host1x, tegra, simpledrm. - Suspend fixes for host1x. Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/lvds-data-mapping.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: LVDS Data Mapping
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maintainers:
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- Laurent Pinchart <[email protected]>
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- Thierry Reding <[email protected]>
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description: |
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LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
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incompatible data link layers have been used over time to transmit image data
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to LVDS devices. This bindings supports devices compatible with the following
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specifications.
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[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
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[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
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Semiconductor
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[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
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Electronics Standards Association (VESA)
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Device compatible with those specifications have been marketed under the
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FPD-Link and FlatLink brands.
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properties:
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data-mapping:
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enum:
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- jeida-18
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- jeida-24
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- vesa-24
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description: |
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The color signals mapping order.
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LVDS data mappings are defined as follows.
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- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
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[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
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DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
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- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
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specifications. Data are transferred as follows on 4 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
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DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
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DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
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- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
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Data are transferred as follows on 4 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
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DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
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DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
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Control signals are mapped as follows.
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CTL0: HSync
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CTL1: VSync
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CTL2: Data Enable
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CTL3: 0
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additionalProperties: true
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...

Documentation/devicetree/bindings/display/lvds.yaml

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title: LVDS Display Common Properties
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allOf:
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- $ref: lvds-data-mapping.yaml#
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maintainers:
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- Laurent Pinchart <[email protected]>
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- Thierry Reding <[email protected]>
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description: |+
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LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
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incompatible data link layers have been used over time to transmit image data
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to LVDS devices. This bindings supports devices compatible with the following
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specifications.
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[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
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[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
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Semiconductor
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[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
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Electronics Standards Association (VESA)
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Device compatible with those specifications have been marketed under the
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FPD-Link and FlatLink brands.
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description:
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This binding extends the data mapping defined in lvds-data-mapping.yaml.
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It supports reversing the bit order on the formats defined there in order
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to accomodate for even more specialized data formats, since a variety of
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data formats and layouts is used to drive LVDS displays.
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properties:
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data-mapping:
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enum:
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- jeida-18
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- jeida-24
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- vesa-24
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description: |
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The color signals mapping order.
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LVDS data mappings are defined as follows.
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- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
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[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
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DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
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- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
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specifications. Data are transferred as follows on 4 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
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DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
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DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
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- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
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Data are transferred as follows on 4 LVDS lanes.
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Slot 0 1 2 3 4 5 6
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________________ _________________
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Clock \_______________________/
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______ ______ ______ ______ ______ ______ ______
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DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
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DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
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DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
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DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
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Control signals are mapped as follows.
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CTL0: HSync
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CTL1: VSync
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CTL2: Data Enable
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CTL3: 0
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data-mirror:
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type: boolean
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description:
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If set, reverse the bit order described in the data mappings below on all
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If set, reverse the bit order described in the data mappings on all
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data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.
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additionalProperties: true

Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml

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enum:
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- leadtek,ltk050h3146w
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- leadtek,ltk050h3146w-a2
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- leadtek,ltk050h3148w
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reg: true
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backlight: true
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reset-gpios: true

Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml

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title: NewVision NV3051D based LCD panel
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description: |
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The NewVision NV3051D is a driver chip used to drive DSI panels. For now,
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this driver only supports the 640x480 panels found in the Anbernic RG353
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based devices.
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The NewVision NV3051D is a driver chip used to drive DSI panels.
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maintainers:
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- Chris Morgan <[email protected]>
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compatible:
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items:
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- enum:
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- anbernic,rg351v-panel
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- anbernic,rg353p-panel
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- anbernic,rg353v-panel
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- const: newvision,nv3051d

Documentation/devicetree/bindings/display/panel/panel-simple.yaml

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allOf:
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- $ref: panel-common.yaml#
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- $ref: ../lvds-data-mapping.yaml#
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properties:
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compatible:
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enum:
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# compatible must be listed in alphabetical order, ordered by compatible.
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power-supply: true
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no-hpd: true
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hpd-gpios: true
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data-mapping: true
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if:
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not:
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properties:
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compatible:
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contains:
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const: innolux,g101ice-l01
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then:
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properties:
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data-mapping: false
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additionalProperties: false
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};
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};
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};
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- |
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panel_lvds: panel-lvds {
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compatible = "innolux,g101ice-l01";
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power-supply = <&vcc_lcd_reg>;
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data-mapping = "jeida-24";
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port {
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panel_in_lvds: endpoint {
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remote-endpoint = <&ltdc_out_lvds>;
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};
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};
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};
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/raydium,rm692e5.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Raydium RM692E5 based DSI display panels
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maintainers:
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- Konrad Dybcio <[email protected]>
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description:
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The Raydium RM692E5 is a generic DSI Panel IC used to control
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AMOLED panels.
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allOf:
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- $ref: panel-common.yaml#
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properties:
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compatible:
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items:
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- const: fairphone,fp5-rm692e5-boe
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- const: raydium,rm692e5
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dvdd-supply:
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description: Digital voltage rail
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vci-supply:
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description: Analog voltage rail
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vddio-supply:
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description: I/O voltage rail
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reg: true
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port: true
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required:
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- compatible
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- reg
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- reset-gpios
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- dvdd-supply
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- vci-supply
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- vddio-supply
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- port
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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dsi {
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "fairphone,fp5-rm692e5-boe", "raydium,rm692e5";
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reg = <0>;
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reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
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dvdd-supply = <&vreg_oled_vci>;
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vci-supply = <&vreg_l12c>;
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vddio-supply = <&vreg_oled_dvdd>;
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port {
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panel_in_0: endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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};
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};
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...

Documentation/gpu/drivers.rst

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xen-front
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afbc
2020
komeda-kms
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panfrost
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.. only:: subproject and html
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Documentation/gpu/drm-mm.rst

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.. kernel-doc:: drivers/gpu/drm/drm_mm.c
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:export:
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DRM GPU VA Manager
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==================
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DRM GPUVM
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=========
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Overview
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--------
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.. kernel-doc:: drivers/gpu/drm/drm_gpuva_mgr.c
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.. kernel-doc:: drivers/gpu/drm/drm_gpuvm.c
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:doc: Overview
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Split and Merge
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---------------
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.. kernel-doc:: drivers/gpu/drm/drm_gpuva_mgr.c
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.. kernel-doc:: drivers/gpu/drm/drm_gpuvm.c
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:doc: Split and Merge
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Locking
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-------
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.. kernel-doc:: drivers/gpu/drm/drm_gpuva_mgr.c
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.. kernel-doc:: drivers/gpu/drm/drm_gpuvm.c
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:doc: Locking
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Examples
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--------
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.. kernel-doc:: drivers/gpu/drm/drm_gpuva_mgr.c
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.. kernel-doc:: drivers/gpu/drm/drm_gpuvm.c
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:doc: Examples
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DRM GPU VA Manager Function References
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--------------------------------------
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DRM GPUVM Function References
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-----------------------------
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.. kernel-doc:: include/drm/drm_gpuva_mgr.h
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.. kernel-doc:: include/drm/drm_gpuvm.h
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:internal:
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.. kernel-doc:: drivers/gpu/drm/drm_gpuva_mgr.c
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.. kernel-doc:: drivers/gpu/drm/drm_gpuvm.c
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:export:
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DRM Buddy Allocator

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