Skip to content

Commit d342df1

Browse files
JackyBaiabelvesa
authored andcommitted
clk: imx: composite-93: keep root clock on when mcore enabled
Previously we assumed that the root clock slice is enabled by default when kernel boot up. But the bootloader may disable the clocks before jump into kernel. The gate ops should be registered rather than NULL to make sure the disabled clock can be enabled when kernel boot up. Refine the code to skip disable the clock if mcore booted. Fixes: a740d73 ("clk: imx: imx93: add mcore_booted module paratemter") Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Peng Fan <[email protected]> Tested-by: Chancel Liu <[email protected]> Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abel Vesa <[email protected]>
1 parent 8f32e9d commit d342df1

File tree

1 file changed

+8
-7
lines changed

1 file changed

+8
-7
lines changed

drivers/clk/imx/clk-composite-93.c

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,13 @@ static int imx93_clk_composite_gate_enable(struct clk_hw *hw)
7676

7777
static void imx93_clk_composite_gate_disable(struct clk_hw *hw)
7878
{
79+
/*
80+
* Skip disable the root clock gate if mcore enabled.
81+
* The root clock may be used by the mcore.
82+
*/
83+
if (mcore_booted)
84+
return;
85+
7986
imx93_clk_composite_gate_endisable(hw, 0);
8087
}
8188

@@ -222,7 +229,7 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p
222229
hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
223230
mux_hw, &clk_mux_ro_ops, div_hw,
224231
&clk_divider_ro_ops, NULL, NULL, flags);
225-
} else if (!mcore_booted) {
232+
} else {
226233
gate = kzalloc(sizeof(*gate), GFP_KERNEL);
227234
if (!gate)
228235
goto fail;
@@ -238,12 +245,6 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p
238245
&imx93_clk_composite_divider_ops, gate_hw,
239246
&imx93_clk_composite_gate_ops,
240247
flags | CLK_SET_RATE_NO_REPARENT);
241-
} else {
242-
hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
243-
mux_hw, &imx93_clk_composite_mux_ops, div_hw,
244-
&imx93_clk_composite_divider_ops, NULL,
245-
&imx93_clk_composite_gate_ops,
246-
flags | CLK_SET_RATE_NO_REPARENT);
247248
}
248249

249250
if (IS_ERR(hw))

0 commit comments

Comments
 (0)