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VincentZWCpalmer-dabbelt
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clocksource: extend the max_delta_ns of timer-riscv and timer-clint to ULONG_MAX
When registering the riscv-timer or clint-timer as a clock_event device, the driver needs to specify the value of max_delta_ticks. This value directly influences the max_delta_ns, which represents the maximum time interval for configuring subsequent clock events. Currently, both riscv-timer and clint-timer are set with a max_delta_ticks value of 0x7fff_ffff. When the timer operates at a high frequency, this values limists the system to sleep only for a short time. For the 1GHz case, the sleep cannot exceed two seconds. To address this limitation, refer to other timer implementations to extend it to 2^(bit-width of the timer) - 1. Because the bit-width of $mtimecmp is 64bit, this value becomes ULONG_MAX (0xffff_ffff_ffff_ffff). Signed-off-by: Vincent Chen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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drivers/clocksource/timer-clint.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@ static int clint_timer_starting_cpu(unsigned int cpu)
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struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu);
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ce->cpumask = cpumask_of(cpu);
134-
clockevents_config_and_register(ce, clint_timer_freq, 100, 0x7fffffff);
134+
clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX);
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enable_percpu_irq(clint_timer_irq,
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irq_get_trigger_type(clint_timer_irq));

drivers/clocksource/timer-riscv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,7 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
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ce->features |= CLOCK_EVT_FEAT_C3STOP;
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if (static_branch_likely(&riscv_sstc_available))
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ce->rating = 450;
117-
clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
117+
clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX);
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enable_percpu_irq(riscv_clock_event_irq,
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irq_get_trigger_type(riscv_clock_event_irq));

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