@@ -312,29 +312,20 @@ static u32 cpg_quirks __initdata;
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#define PLL_ERRATA BIT(0) /* Missing PLL0/2/4 post-divider */
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#define RCKCR_CKSEL BIT(1) /* Manual RCLK parent selection */
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- #define SD_SKIP_FIRST BIT(2) /* Skip first clock in SD table */
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static const struct soc_device_attribute cpg_quirks_match [] __initconst = {
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{
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.soc_id = "r8a7795" , .revision = "ES1.0" ,
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- .data = (void * )(PLL_ERRATA | RCKCR_CKSEL | SD_SKIP_FIRST ),
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+ .data = (void * )(PLL_ERRATA | RCKCR_CKSEL ),
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},
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{
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.soc_id = "r8a7795" , .revision = "ES1.*" ,
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- .data = (void * )(RCKCR_CKSEL | SD_SKIP_FIRST ),
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- },
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- {
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- .soc_id = "r8a7795" , .revision = "ES2.0" ,
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- .data = (void * )SD_SKIP_FIRST ,
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+ .data = (void * )(RCKCR_CKSEL ),
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},
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{
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.soc_id = "r8a7796" , .revision = "ES1.0" ,
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- .data = (void * )(RCKCR_CKSEL | SD_SKIP_FIRST ),
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- },
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- {
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- .soc_id = "r8a7796" , .revision = "ES1.1" ,
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- .data = (void * )SD_SKIP_FIRST ,
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+ .data = (void * )(RCKCR_CKSEL ),
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},
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{ /* sentinel */ }
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};
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