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dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description
Add "xsfvfwmaccqqq" ISA extension which is provided by SiFive for matrix multiply accumulate instructions support. Signed-off-by: Cyan Yang <[email protected]> Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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Documentation/devicetree/bindings/riscv/extensions.yaml

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@@ -681,6 +681,12 @@ properties:
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See more details in
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https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions
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- const: xsfvfwmaccqqq
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description:
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SiFive Matrix Multiply Accumulate Instruction Extensions Specification.
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See more details in
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https://www.sifive.com/document-file/matrix-multiply-accumulate-instruction
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# T-HEAD
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- const: xtheadvector
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description:

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