@@ -49,27 +49,20 @@ struct nmi_desc {
49
49
struct list_head head ;
50
50
};
51
51
52
- static struct nmi_desc nmi_desc [NMI_MAX ] =
53
- {
54
- {
55
- .lock = __RAW_SPIN_LOCK_UNLOCKED (& nmi_desc [0 ].lock ),
56
- .head = LIST_HEAD_INIT (nmi_desc [0 ].head ),
57
- },
58
- {
59
- .lock = __RAW_SPIN_LOCK_UNLOCKED (& nmi_desc [1 ].lock ),
60
- .head = LIST_HEAD_INIT (nmi_desc [1 ].head ),
61
- },
62
- {
63
- .lock = __RAW_SPIN_LOCK_UNLOCKED (& nmi_desc [2 ].lock ),
64
- .head = LIST_HEAD_INIT (nmi_desc [2 ].head ),
65
- },
66
- {
67
- .lock = __RAW_SPIN_LOCK_UNLOCKED (& nmi_desc [3 ].lock ),
68
- .head = LIST_HEAD_INIT (nmi_desc [3 ].head ),
69
- },
52
+ #define NMI_DESC_INIT (type ) { \
53
+ .lock = __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[type].lock), \
54
+ .head = LIST_HEAD_INIT(nmi_desc[type].head), \
55
+ }
70
56
57
+ static struct nmi_desc nmi_desc [NMI_MAX ] = {
58
+ NMI_DESC_INIT (NMI_LOCAL ),
59
+ NMI_DESC_INIT (NMI_UNKNOWN ),
60
+ NMI_DESC_INIT (NMI_SERR ),
61
+ NMI_DESC_INIT (NMI_IO_CHECK ),
71
62
};
72
63
64
+ #define nmi_to_desc (type ) (&nmi_desc[type])
65
+
73
66
struct nmi_stats {
74
67
unsigned int normal ;
75
68
unsigned int unknown ;
@@ -91,6 +84,9 @@ static DEFINE_PER_CPU(struct nmi_stats, nmi_stats);
91
84
static int ignore_nmis __read_mostly ;
92
85
93
86
int unknown_nmi_panic ;
87
+ int panic_on_unrecovered_nmi ;
88
+ int panic_on_io_nmi ;
89
+
94
90
/*
95
91
* Prevent NMI reason port (0x61) being accessed simultaneously, can
96
92
* only be used in NMI handler.
@@ -104,8 +100,6 @@ static int __init setup_unknown_nmi_panic(char *str)
104
100
}
105
101
__setup ("unknown_nmi_panic" , setup_unknown_nmi_panic );
106
102
107
- #define nmi_to_desc (type ) (&nmi_desc[type])
108
-
109
103
static u64 nmi_longest_ns = 1 * NSEC_PER_MSEC ;
110
104
111
105
static int __init nmi_warning_debugfs (void )
@@ -125,12 +119,12 @@ static void nmi_check_duration(struct nmiaction *action, u64 duration)
125
119
126
120
action -> max_duration = duration ;
127
121
128
- remainder_ns = do_div (duration , (1000 * 1000 ));
129
- decimal_msecs = remainder_ns / 1000 ;
122
+ /* Convert duration from nsec to msec */
123
+ remainder_ns = do_div (duration , NSEC_PER_MSEC );
124
+ decimal_msecs = remainder_ns / NSEC_PER_USEC ;
130
125
131
- printk_ratelimited (KERN_INFO
132
- "INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n" ,
133
- action -> handler , duration , decimal_msecs );
126
+ pr_info_ratelimited ("INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n" ,
127
+ action -> handler , duration , decimal_msecs );
134
128
}
135
129
136
130
static int nmi_handle (unsigned int type , struct pt_regs * regs )
@@ -333,10 +327,9 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
333
327
int handled ;
334
328
335
329
/*
336
- * Use 'false' as back-to-back NMIs are dealt with one level up.
337
- * Of course this makes having multiple 'unknown' handlers useless
338
- * as only the first one is ever run (unless it can actually determine
339
- * if it caused the NMI)
330
+ * As a last resort, let the "unknown" handlers make a
331
+ * best-effort attempt to figure out if they can claim
332
+ * responsibility for this Unknown NMI.
340
333
*/
341
334
handled = nmi_handle (NMI_UNKNOWN , regs );
342
335
if (handled ) {
@@ -366,17 +359,18 @@ static noinstr void default_do_nmi(struct pt_regs *regs)
366
359
bool b2b = false;
367
360
368
361
/*
369
- * CPU-specific NMI must be processed before non-CPU-specific
370
- * NMI, otherwise we may lose it, because the CPU-specific
371
- * NMI can not be detected/processed on other CPUs.
372
- */
373
-
374
- /*
375
- * Back-to-back NMIs are interesting because they can either
376
- * be two NMI or more than two NMIs (any thing over two is dropped
377
- * due to NMI being edge-triggered). If this is the second half
378
- * of the back-to-back NMI, assume we dropped things and process
379
- * more handlers. Otherwise reset the 'swallow' NMI behaviour
362
+ * Back-to-back NMIs are detected by comparing the RIP of the
363
+ * current NMI with that of the previous NMI. If it is the same,
364
+ * it is assumed that the CPU did not have a chance to jump back
365
+ * into a non-NMI context and execute code in between the two
366
+ * NMIs.
367
+ *
368
+ * They are interesting because even if there are more than two,
369
+ * only a maximum of two can be detected (anything over two is
370
+ * dropped due to NMI being edge-triggered). If this is the
371
+ * second half of the back-to-back NMI, assume we dropped things
372
+ * and process more handlers. Otherwise, reset the 'swallow' NMI
373
+ * behavior.
380
374
*/
381
375
if (regs -> ip == __this_cpu_read (last_nmi_rip ))
382
376
b2b = true;
@@ -390,6 +384,11 @@ static noinstr void default_do_nmi(struct pt_regs *regs)
390
384
if (microcode_nmi_handler_enabled () && microcode_nmi_handler ())
391
385
goto out ;
392
386
387
+ /*
388
+ * CPU-specific NMI must be processed before non-CPU-specific
389
+ * NMI, otherwise we may lose it, because the CPU-specific
390
+ * NMI can not be detected/processed on other CPUs.
391
+ */
393
392
handled = nmi_handle (NMI_LOCAL , regs );
394
393
__this_cpu_add (nmi_stats .normal , handled );
395
394
if (handled ) {
@@ -426,13 +425,14 @@ static noinstr void default_do_nmi(struct pt_regs *regs)
426
425
pci_serr_error (reason , regs );
427
426
else if (reason & NMI_REASON_IOCHK )
428
427
io_check_error (reason , regs );
429
- #ifdef CONFIG_X86_32
428
+
430
429
/*
431
430
* Reassert NMI in case it became active
432
431
* meanwhile as it's edge-triggered:
433
432
*/
434
- reassert_nmi ();
435
- #endif
433
+ if (IS_ENABLED (CONFIG_X86_32 ))
434
+ reassert_nmi ();
435
+
436
436
__this_cpu_add (nmi_stats .external , 1 );
437
437
raw_spin_unlock (& nmi_reason_lock );
438
438
goto out ;
@@ -751,4 +751,3 @@ void local_touch_nmi(void)
751
751
{
752
752
__this_cpu_write (last_nmi_rip , 0 );
753
753
}
754
- EXPORT_SYMBOL_GPL (local_touch_nmi );
0 commit comments