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Kan LiangPeter Zijlstra
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x86/msr-index: Add bunch of MSRs for Arch LBR
Add Arch LBR related MSRs and the new LBR INFO bits in MSR-index. Signed-off-by: Kan Liang <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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arch/x86/include/asm/msr-index.h

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@@ -158,7 +158,23 @@
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#define LBR_INFO_MISPRED BIT_ULL(63)
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#define LBR_INFO_IN_TX BIT_ULL(62)
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#define LBR_INFO_ABORT BIT_ULL(61)
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#define LBR_INFO_CYC_CNT_VALID BIT_ULL(60)
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#define LBR_INFO_CYCLES 0xffff
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#define LBR_INFO_BR_TYPE_OFFSET 56
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#define LBR_INFO_BR_TYPE (0xfull << LBR_INFO_BR_TYPE_OFFSET)
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#define MSR_ARCH_LBR_CTL 0x000014ce
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#define ARCH_LBR_CTL_LBREN BIT(0)
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#define ARCH_LBR_CTL_CPL_OFFSET 1
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#define ARCH_LBR_CTL_CPL (0x3ull << ARCH_LBR_CTL_CPL_OFFSET)
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#define ARCH_LBR_CTL_STACK_OFFSET 3
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#define ARCH_LBR_CTL_STACK (0x1ull << ARCH_LBR_CTL_STACK_OFFSET)
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#define ARCH_LBR_CTL_FILTER_OFFSET 16
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#define ARCH_LBR_CTL_FILTER (0x7full << ARCH_LBR_CTL_FILTER_OFFSET)
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#define MSR_ARCH_LBR_DEPTH 0x000014cf
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#define MSR_ARCH_LBR_FROM_0 0x00001500
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#define MSR_ARCH_LBR_TO_0 0x00001600
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#define MSR_ARCH_LBR_INFO_0 0x00001200
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#define MSR_IA32_PEBS_ENABLE 0x000003f1
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#define MSR_PEBS_DATA_CFG 0x000003f2

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