@@ -313,7 +313,7 @@ static void ast_set_crtc_reg(struct ast_private *ast,
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u8 jreg05 = 0 , jreg07 = 0 , jreg09 = 0 , jregAC = 0 , jregAD = 0 , jregAE = 0 ;
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u16 temp , precache = 0 ;
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- if ((ast -> chip == AST2500 ) &&
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+ if ((ast -> chip == AST2500 || ast -> chip == AST2600 ) &&
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(vbios_mode -> enh_table -> flags & AST2500PreCatchCRT ))
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precache = 40 ;
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@@ -354,6 +354,12 @@ static void ast_set_crtc_reg(struct ast_private *ast,
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ast_set_index_reg_mask (ast , AST_IO_CRTC_PORT , 0xAC , 0x00 , jregAC );
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ast_set_index_reg_mask (ast , AST_IO_CRTC_PORT , 0xAD , 0x00 , jregAD );
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+ // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels);
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+ if ((ast -> chip == AST2600 ) && (mode -> crtc_vdisplay == 1080 ))
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+ ast_set_index_reg_mask (ast , AST_IO_CRTC_PORT , 0xFC , 0xFD , 0x02 );
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+ else
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+ ast_set_index_reg_mask (ast , AST_IO_CRTC_PORT , 0xFC , 0xFD , 0x00 );
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+
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/* vert timings */
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temp = (mode -> crtc_vtotal ) - 2 ;
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if (temp & 0x100 )
@@ -431,7 +437,7 @@ static void ast_set_dclk_reg(struct ast_private *ast,
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{
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const struct ast_vbios_dclk_info * clk_info ;
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- if (ast -> chip == AST2500 )
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+ if (( ast -> chip == AST2500 ) || ( ast -> chip == AST2600 ) )
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clk_info = & dclk_table_ast2500 [vbios_mode -> enh_table -> dclk_index ];
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else
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clk_info = & dclk_table [vbios_mode -> enh_table -> dclk_index ];
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