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Merge branch 'omap-for-v5.6/ti-sysc-dt-cam' into omap-for-v5.6/dt
2 parents 6bcc319 + 1a20951 commit d7a9d45

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20 files changed

+559
-34
lines changed

20 files changed

+559
-34
lines changed

Documentation/devicetree/bindings/clock/ti-clkctrl.txt

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,18 +16,23 @@ For more information, please see the Linux clock framework binding at
1616
Documentation/devicetree/bindings/clock/clock-bindings.txt.
1717

1818
Required properties :
19-
- compatible : shall be "ti,clkctrl"
19+
- compatible : shall be "ti,clkctrl" or a clock domain specific name:
20+
"ti,clkctrl-l4-cfg"
21+
"ti,clkctrl-l4-per"
22+
"ti,clkctrl-l4-secure"
23+
"ti,clkctrl-l4-wkup"
2024
- #clock-cells : shall contain 2 with the first entry being the instance
2125
offset from the clock domain base and the second being the
2226
clock index
27+
- reg : clock registers
2328

2429
Example: Clock controller node on omap 4430:
2530

2631
&cm2 {
2732
l4per: cm@1400 {
2833
cm_l4per@0 {
29-
cm_l4per_clkctrl: clk@20 {
30-
compatible = "ti,clkctrl";
34+
cm_l4per_clkctrl: clock@20 {
35+
compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
3136
reg = <0x20 0x1b0>;
3237
#clock-cells = <2>;
3338
};

Documentation/devicetree/bindings/clock/ti/dra7-atl.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ Configuration of ATL instances:
4343
- aws : Audio word select signal selection
4444
};
4545

46-
For valid word select signals, see the dt-bindings/clk/ti-dra7-atl.h include
46+
For valid word select signals, see the dt-bindings/clock/ti-dra7-atl.h include
4747
file.
4848

4949
Examples:
@@ -83,7 +83,7 @@ atl: atl@4843c000 {
8383
clock-names = "fck";
8484
};
8585

86-
#include <dt-bindings/clk/ti-dra7-atl.h>
86+
#include <dt-bindings/clock/ti-dra7-atl.h>
8787

8888
&atl {
8989

arch/arm/boot/dts/am437x-sk-evm.dts

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -272,6 +272,12 @@
272272
>;
273273
};
274274

275+
clkout1_pin: pinmux_clkout1_pin {
276+
pinctrl-single,pins = <
277+
0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
278+
>;
279+
};
280+
275281
cpsw_default: cpsw_default {
276282
pinctrl-single,pins = <
277283
/* Slave 1 */
@@ -593,6 +599,25 @@
593599
pinctrl-0 = <&i2c1_pins>;
594600
clock-frequency = <400000>;
595601

602+
ov2659@30 {
603+
compatible = "ovti,ov2659";
604+
reg = <0x30>;
605+
pinctrl-names = "default";
606+
pinctrl-0 = <&clkout1_pin>;
607+
608+
clocks = <&clkout1_mux_ck>;
609+
clock-names = "xvclk";
610+
assigned-clocks = <&clkout1_mux_ck>;
611+
assigned-clock-parents = <&clkout1_osc_div_ck>;
612+
613+
port {
614+
ov2659_1: endpoint {
615+
remote-endpoint = <&vpfe0_ep>;
616+
link-frequencies = /bits/ 64 <70000000>;
617+
};
618+
};
619+
};
620+
596621
edt-ft5306@38 {
597622
status = "okay";
598623
compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
@@ -877,7 +902,7 @@
877902
/* Camera port */
878903
port {
879904
vpfe0_ep: endpoint {
880-
/* remote-endpoint = <&sensor>; add once we have it */
905+
remote-endpoint = <&ov2659_1>;
881906
ti,am437x-vpfe-interface = <0>;
882907
bus-width = <8>;
883908
hsync-active = <0>;

arch/arm/boot/dts/am43x-epos-evm.dts

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -145,6 +145,12 @@
145145
system-clock-frequency = <12000000>;
146146
};
147147
};
148+
149+
audio_mstrclk: clock {
150+
compatible = "fixed-clock";
151+
#clock-cells = <0>;
152+
clock-frequency = <12000000>;
153+
};
148154
};
149155

150156
&am43xx_pinmux {
@@ -696,6 +702,21 @@
696702
IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
697703
DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
698704
};
705+
706+
ov2659@30 {
707+
compatible = "ovti,ov2659";
708+
reg = <0x30>;
709+
710+
clocks = <&audio_mstrclk>;
711+
clock-names = "xvclk";
712+
713+
port {
714+
ov2659_1: endpoint {
715+
remote-endpoint = <&vpfe1_ep>;
716+
link-frequencies = /bits/ 64 <70000000>;
717+
};
718+
};
719+
};
699720
};
700721

701722
&i2c2 {
@@ -962,7 +983,7 @@
962983

963984
port {
964985
vpfe1_ep: endpoint {
965-
/* remote-endpoint = <&sensor>; add once we have it */
986+
remote-endpoint = <&ov2659_1>;
966987
ti,am437x-vpfe-interface = <0>;
967988
bus-width = <8>;
968989
hsync-active = <0>;

arch/arm/boot/dts/am43xx-clocks.dtsi

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -704,6 +704,60 @@
704704
ti,bit-shift = <8>;
705705
reg = <0x2a48>;
706706
};
707+
708+
clkout1_osc_div_ck: clkout1-osc-div-ck {
709+
#clock-cells = <0>;
710+
compatible = "ti,divider-clock";
711+
clocks = <&sys_clkin_ck>;
712+
ti,bit-shift = <20>;
713+
ti,max-div = <4>;
714+
reg = <0x4100>;
715+
};
716+
717+
clkout1_src2_mux_ck: clkout1-src2-mux-ck {
718+
#clock-cells = <0>;
719+
compatible = "ti,mux-clock";
720+
clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
721+
<&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
722+
<&dpll_mpu_m2_ck>;
723+
reg = <0x4100>;
724+
};
725+
726+
clkout1_src2_pre_div_ck: clkout1-src2-pre-div-ck {
727+
#clock-cells = <0>;
728+
compatible = "ti,divider-clock";
729+
clocks = <&clkout1_src2_mux_ck>;
730+
ti,bit-shift = <4>;
731+
ti,max-div = <8>;
732+
reg = <0x4100>;
733+
};
734+
735+
clkout1_src2_post_div_ck: clkout1-src2-post-div-ck {
736+
#clock-cells = <0>;
737+
compatible = "ti,divider-clock";
738+
clocks = <&clkout1_src2_pre_div_ck>;
739+
ti,bit-shift = <8>;
740+
ti,max-div = <32>;
741+
ti,index-power-of-two;
742+
reg = <0x4100>;
743+
};
744+
745+
clkout1_mux_ck: clkout1-mux-ck {
746+
#clock-cells = <0>;
747+
compatible = "ti,mux-clock";
748+
clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>,
749+
<&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>;
750+
ti,bit-shift = <16>;
751+
reg = <0x4100>;
752+
};
753+
754+
clkout1_ck: clkout1-ck {
755+
#clock-cells = <0>;
756+
compatible = "ti,gate-clock";
757+
clocks = <&clkout1_mux_ck>;
758+
ti,bit-shift = <23>;
759+
reg = <0x4100>;
760+
};
707761
};
708762

709763
&prcm {

arch/arm/boot/dts/dra7-evm-common.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
*/
55

66
#include <dt-bindings/gpio/gpio.h>
7-
#include <dt-bindings/clk/ti-dra7-atl.h>
7+
#include <dt-bindings/clock/ti-dra7-atl.h>
88
#include <dt-bindings/input/input.h>
99

1010
/ {

arch/arm/boot/dts/dra7-l4.dtsi

Lines changed: 62 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4166,35 +4166,88 @@
41664166
};
41674167

41684168
target-module@170000 { /* 0x48970000, ap 21 0a.0 */
4169-
compatible = "ti,sysc";
4170-
status = "disabled";
4169+
compatible = "ti,sysc-omap4", "ti,sysc";
4170+
reg = <0x170010 0x4>;
4171+
reg-names = "sysc";
4172+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
4173+
<SYSC_IDLE_NO>,
4174+
<SYSC_IDLE_SMART>;
4175+
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
4176+
<SYSC_IDLE_NO>,
4177+
<SYSC_IDLE_SMART>;
4178+
clocks = <&cam_clkctrl DRA7_CAM_VIP1_CLKCTRL 0>;
4179+
clock-names = "fck";
41714180
#address-cells = <1>;
41724181
#size-cells = <1>;
41734182
ranges = <0x0 0x170000 0x10000>;
4183+
status = "disabled";
41744184
};
41754185

41764186
target-module@190000 { /* 0x48990000, ap 23 2e.0 */
4177-
compatible = "ti,sysc";
4178-
status = "disabled";
4187+
compatible = "ti,sysc-omap4", "ti,sysc";
4188+
reg = <0x190010 0x4>;
4189+
reg-names = "sysc";
4190+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
4191+
<SYSC_IDLE_NO>,
4192+
<SYSC_IDLE_SMART>;
4193+
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
4194+
<SYSC_IDLE_NO>,
4195+
<SYSC_IDLE_SMART>;
4196+
clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
4197+
clock-names = "fck";
41794198
#address-cells = <1>;
41804199
#size-cells = <1>;
41814200
ranges = <0x0 0x190000 0x10000>;
4201+
status = "disabled";
41824202
};
41834203

41844204
target-module@1b0000 { /* 0x489b0000, ap 25 34.0 */
4185-
compatible = "ti,sysc";
4186-
status = "disabled";
4205+
compatible = "ti,sysc-omap4", "ti,sysc";
4206+
reg = <0x1b0000 0x4>,
4207+
<0x1b0010 0x4>;
4208+
reg-names = "rev", "sysc";
4209+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
4210+
<SYSC_IDLE_NO>,
4211+
<SYSC_IDLE_SMART>;
4212+
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
4213+
<SYSC_IDLE_NO>,
4214+
<SYSC_IDLE_SMART>;
4215+
clocks = <&cam_clkctrl DRA7_CAM_VIP3_CLKCTRL 0>;
4216+
clock-names = "fck";
41874217
#address-cells = <1>;
41884218
#size-cells = <1>;
41894219
ranges = <0x0 0x1b0000 0x10000>;
4220+
status = "disabled";
41904221
};
41914222

4192-
target-module@1d0000 { /* 0x489d0000, ap 27 30.0 */
4193-
compatible = "ti,sysc";
4194-
status = "disabled";
4223+
target-module@1d0010 { /* 0x489d0000, ap 27 30.0 */
4224+
compatible = "ti,sysc-omap4", "ti,sysc";
4225+
reg = <0x1d0010 0x4>;
4226+
reg-names = "sysc";
4227+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
4228+
<SYSC_IDLE_NO>,
4229+
<SYSC_IDLE_SMART>;
4230+
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
4231+
<SYSC_IDLE_NO>,
4232+
<SYSC_IDLE_SMART>;
4233+
clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
4234+
clock-names = "fck";
41954235
#address-cells = <1>;
41964236
#size-cells = <1>;
41974237
ranges = <0x0 0x1d0000 0x10000>;
4238+
4239+
vpe: vpe@0 {
4240+
compatible = "ti,dra7-vpe";
4241+
reg = <0x0000 0x120>,
4242+
<0x0700 0x80>,
4243+
<0x5700 0x18>,
4244+
<0xd000 0x400>;
4245+
reg-names = "vpe_top",
4246+
"sc",
4247+
"csc",
4248+
"vpdma";
4249+
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
4250+
};
41984251
};
41994252
};
42004253
};

arch/arm/boot/dts/dra72-evm-common.dtsi

Lines changed: 32 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66

77
#include "dra72x.dtsi"
88
#include <dt-bindings/gpio/gpio.h>
9-
#include <dt-bindings/clk/ti-dra7-atl.h>
9+
#include <dt-bindings/clock/ti-dra7-atl.h>
1010

1111
/ {
1212
compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
@@ -187,6 +187,12 @@
187187
gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>;
188188
enable-active-high;
189189
};
190+
191+
clk_ov5640_fixed: clock {
192+
compatible = "fixed-clock";
193+
#clock-cells = <0>;
194+
clock-frequency = <24000000>;
195+
};
190196
};
191197

192198
&dra7_pmx_core {
@@ -269,6 +275,23 @@
269275
line-name = "vin6_sel_s0";
270276
};
271277
};
278+
279+
ov5640@3c {
280+
compatible = "ovti,ov5640";
281+
reg = <0x3c>;
282+
283+
clocks = <&clk_ov5640_fixed>;
284+
clock-names = "xclk";
285+
286+
port {
287+
csi2_cam0: endpoint {
288+
remote-endpoint = <&csi2_phy0>;
289+
clock-lanes = <0>;
290+
data-lanes = <1 2>;
291+
};
292+
};
293+
};
294+
272295
};
273296

274297
&uart1 {
@@ -580,3 +603,11 @@
580603
&pcie1_rc {
581604
status = "okay";
582605
};
606+
607+
&csi2_0 {
608+
csi2_phy0: endpoint {
609+
remote-endpoint = <&csi2_cam0>;
610+
clock-lanes = <0>;
611+
data-lanes = <1 2>;
612+
};
613+
};

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