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Prathamesh SheteBartosz Golaszewski
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gpio: tegra186: Fix tegra186_gpio_is_accessible() check
The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin. This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met: - SCR_SEC_REN + SCR_SEC_WEN both set or - SCR_SEC_REN + SCR_SEC_WEN both set and SCR_SEC_G1R + SCR_SEC_G1W both set Update the check to properly handle cases where only one of SCR_SEC_REN or SCR_SEC_WEN is set. Fixes: b2b56a1 ("gpio: tegra186: Check GPIO pin permission before access.") Signed-off-by: Prathamesh Shete <[email protected]> Acked-by: Thierry Reding <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bartosz Golaszewski <[email protected]>
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drivers/gpio/gpio-tegra186.c

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,6 @@
3636
#define TEGRA186_GPIO_SCR_SEC_REN BIT(27)
3737
#define TEGRA186_GPIO_SCR_SEC_G1W BIT(9)
3838
#define TEGRA186_GPIO_SCR_SEC_G1R BIT(1)
39-
#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \
40-
TEGRA186_GPIO_SCR_SEC_REN | \
41-
TEGRA186_GPIO_SCR_SEC_G1R | \
42-
TEGRA186_GPIO_SCR_SEC_G1W)
43-
#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \
44-
TEGRA186_GPIO_SCR_SEC_REN)
4539

4640
/* control registers */
4741
#define TEGRA186_GPIO_ENABLE_CONFIG 0x00
@@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned
177171

178172
value = __raw_readl(secure + TEGRA186_GPIO_SCR);
179173

180-
if ((value & TEGRA186_GPIO_SCR_SEC_ENABLE) == 0)
181-
return true;
174+
/*
175+
* When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the
176+
* registers for given GPIO pin.
177+
* When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying
178+
* SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given
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* GPIO pin.
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*/
182181

183-
if ((value & TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS)
182+
if (((value & TEGRA186_GPIO_SCR_SEC_REN) == 0 ||
183+
((value & TEGRA186_GPIO_SCR_SEC_REN) && (value & TEGRA186_GPIO_SCR_SEC_G1R))) &&
184+
((value & TEGRA186_GPIO_SCR_SEC_WEN) == 0 ||
185+
((value & TEGRA186_GPIO_SCR_SEC_WEN) && (value & TEGRA186_GPIO_SCR_SEC_G1W))))
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return true;
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186188
return false;

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