Skip to content

Commit d871a94

Browse files
Niklas Söderlundgeertu
authored andcommitted
clk: renesas: r8a779g0: Add ISP core clocks
Add the ISP core modules clock for Renesas R-Car V4H. Signed-off-by: Niklas Söderlund <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
1 parent 3b0016a commit d871a94

File tree

1 file changed

+2
-0
lines changed

1 file changed

+2
-0
lines changed

drivers/clk/renesas/r8a779g0-cpg-mssr.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -163,6 +163,8 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = {
163163
};
164164

165165
static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
166+
DEF_MOD("isp0", 16, R8A779G0_CLK_S0D2_VIO),
167+
DEF_MOD("isp1", 17, R8A779G0_CLK_S0D2_VIO),
166168
DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC),
167169
DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC),
168170
DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC),

0 commit comments

Comments
 (0)