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Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull IRQ chip updates from Ingo Molnar: "A late irqchips update: - New TI INTR/INTA set of drivers - Rewrite of the stm32mp1-exti driver as a platform driver - Update the IOMMU MSI mapping API to be RT friendly - A number of cleanups and other low impact fixes" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits) iommu/dma-iommu: Remove iommu_dma_map_msi_msg() irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg() irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg() irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg() irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg() iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts genirq/msi: Add a new field in msi_desc to store an IOMMU cookie arm64: arch_k3: Enable interrupt controller drivers irqchip/ti-sci-inta: Add msi domain support soc: ti: Add MSI domain bus support for Interrupt Aggregator irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings irqchip/ti-sci-intr: Add support for Interrupt Router driver dt-bindings: irqchip: Introduce TISCI Interrupt router bindings gpio: thunderx: Use the default parent apis for {request,release}_resources genirq: Introduce irq_chip_{request,release}_resource_parent() apis firmware: ti_sci: Add helper apis to manage resources firmware: ti_sci: Add RM mapping table for am654 firmware: ti_sci: Add support for IRQ management firmware: ti_sci: Add support for RM core ops ...
2 parents 39feaa3 + fb4e059 commit d9351ea

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‎Documentation/devicetree/bindings/arm/keystone/ti,sci.txt

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@@ -24,7 +24,8 @@ relationship between the TI-SCI parent node to the child node.
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Required properties:
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-------------------
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- compatible: should be "ti,k2g-sci"
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- compatible: should be "ti,k2g-sci" for TI 66AK2G SoC
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should be "ti,am654-sci" for for TI AM654 SoC
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- mbox-names:
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"rx" - Mailbox corresponding to receive path
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"tx" - Mailbox corresponding to transmit path

‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt

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Texas Instruments K3 Interrupt Aggregator
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=========================================
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The Interrupt Aggregator (INTA) provides a centralized machine
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which handles the termination of system events to that they can
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be coherently processed by the host(s) in the system. A maximum
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of 64 events can be mapped to a single interrupt.
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Interrupt Aggregator
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+-----------------------------------------+
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| Intmap VINT |
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| +--------------+ +------------+ |
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m ------>| | vint | bit | | 0 |.....|63| vint0 |
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. | +--------------+ +------------+ | +------+
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. | . . | | HOST |
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Globalevents ------>| . . |------>| IRQ |
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. | . . | | CTRL |
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. | . . | +------+
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n ------>| +--------------+ +------------+ |
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| | vint | bit | | 0 |.....|63| vintx |
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| +--------------+ +------------+ |
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| |
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+-----------------------------------------+
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Configuration of these Intmap registers that maps global events to vint is done
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by a system controller (like the Device Memory and Security Controller on K3
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AM654 SoC). Driver should request the system controller to get the range
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of global events and vints assigned to the requesting host. Management
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of these requested resources should be handled by driver and requests
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system controller to map specific global event to vint, bit pair.
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Communication between the host processor running an OS and the system
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controller happens through a protocol called TI System Control Interface
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(TISCI protocol). For more details refer:
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Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
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TISCI Interrupt Aggregator Node:
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-------------------------------
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- compatible: Must be "ti,sci-inta".
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- reg: Should contain registers location and length.
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- interrupt-controller: Identifies the node as an interrupt controller
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- msi-controller: Identifies the node as an MSI controller.
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- interrupt-parent: phandle of irq parent.
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- ti,sci: Phandle to TI-SCI compatible System controller node.
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- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator.
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- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta
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outputs) range within this INTA, assigned to the
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requesting host context.
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- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the
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global events range reaching this IA and are assigned
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to the requesting host context.
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Example:
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--------
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main_udmass_inta: interrupt-controller@33d00000 {
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compatible = "ti,sci-inta";
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reg = <0x0 0x33d00000 0x0 0x100000>;
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interrupt-controller;
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msi-controller;
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interrupt-parent = <&main_navss_intr>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <179>;
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ti,sci-rm-range-vint = <0x0>;
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ti,sci-rm-range-global-event = <0x1>;
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};

‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

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Texas Instruments K3 Interrupt Router
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=====================================
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The Interrupt Router (INTR) module provides a mechanism to mux M
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interrupt inputs to N interrupt outputs, where all M inputs are selectable
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to be driven per N output. An Interrupt Router can either handle edge triggered
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or level triggered interrupts and that is fixed in hardware.
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Interrupt Router
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+----------------------+
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| Inputs Outputs |
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+-------+ | +------+ +-----+ |
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| GPIO |----------->| | irq0 | | 0 | | Host IRQ
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+-------+ | +------+ +-----+ | controller
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| . . | +-------+
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+-------+ | . . |----->| IRQ |
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| INTA |----------->| . . | +-------+
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+-------+ | . +-----+ |
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| +------+ | N | |
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| | irqM | +-----+ |
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| +------+ |
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| |
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+----------------------+
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There is one register per output (MUXCNTL_N) that controls the selection.
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Configuration of these MUXCNTL_N registers is done by a system controller
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(like the Device Memory and Security Controller on K3 AM654 SoC). System
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controller will keep track of the used and unused registers within the Router.
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Driver should request the system controller to get the range of GIC IRQs
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assigned to the requesting hosts. It is the drivers responsibility to keep
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track of Host IRQs.
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Communication between the host processor running an OS and the system
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controller happens through a protocol called TI System Control Interface
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(TISCI protocol). For more details refer:
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Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
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TISCI Interrupt Router Node:
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----------------------------
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Required Properties:
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- compatible: Must be "ti,sci-intr".
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- ti,intr-trigger-type: Should be one of the following:
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1: If intr supports edge triggered interrupts.
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4: If intr supports level triggered interrupts.
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- interrupt-controller: Identifies the node as an interrupt controller
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. The value should be 2.
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First cell should contain the TISCI device ID of source
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Second cell should contain the interrupt source offset
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within the device.
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- ti,sci: Phandle to TI-SCI compatible System controller node.
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- ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
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- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
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assigned to this interrupt router. Each subtype id
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corresponds to a range of host irqs.
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For more details on TISCI IRQ resource management refer:
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http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
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Example:
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--------
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The following example demonstrates both interrupt router node and the consumer
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node(main gpio) on the AM654 SoC:
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main_intr: interrupt-controller0 {
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compatible = "ti,sci-intr";
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ti,intr-trigger-type = <1>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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#interrupt-cells = <2>;
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ti,sci = <&dmsc>;
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ti,sci-dst-id = <56>;
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ti,sci-rm-range-girq = <0x1>;
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};
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main_gpio0: gpio@600000 {
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...
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interrupt-parent = <&main_intr>;
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interrupts = <57 256>, <57 257>, <57 258>,
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<57 259>, <57 260>, <57 261>;
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...
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};

‎MAINTAINERS

Lines changed: 6 additions & 0 deletions
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@@ -15547,6 +15547,12 @@ F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
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F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
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F: drivers/clk/keystone/sci-clk.c
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F: drivers/reset/reset-ti-sci.c
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
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F: drivers/irqchip/irq-ti-sci-intr.c
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F: drivers/irqchip/irq-ti-sci-inta.c
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F: include/linux/soc/ti/ti_sci_inta_msi.h
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F: drivers/soc/ti/ti_sci_inta_msi.c
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1555115557
Texas Instruments ASoC drivers
1555215558
M: Peter Ujfalusi <[email protected]>

‎arch/arm64/Kconfig.platforms

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@@ -87,6 +87,11 @@ config ARCH_EXYNOS
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config ARCH_K3
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bool "Texas Instruments Inc. K3 multicore SoC architecture"
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select PM_GENERIC_DOMAINS if PM
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select MAILBOX
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select TI_MESSAGE_MANAGER
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select TI_SCI_PROTOCOL
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select TI_SCI_INTR_IRQCHIP
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select TI_SCI_INTA_IRQCHIP
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help
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This enables support for Texas Instruments' K3 multicore SoC
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architecture.

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