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ARM: dts: sun8i: r40: Move SPI device nodes based on address order
When the SPI device nodes were added, they were added in the wrong location in the device tree file. The device nodes should be sorted by register address. Move the devices node to their correct positions within the file. Fixes: 554581b ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes") Acked-by: Maxime Ripard <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]>
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arch/arm/boot/dts/sun8i-r40.dtsi

Lines changed: 52 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,32 @@
181181
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
182182
};
183183

184+
spi0: spi@1c05000 {
185+
compatible = "allwinner,sun8i-r40-spi",
186+
"allwinner,sun8i-h3-spi";
187+
reg = <0x01c05000 0x1000>;
188+
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
189+
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
190+
clock-names = "ahb", "mod";
191+
resets = <&ccu RST_BUS_SPI0>;
192+
status = "disabled";
193+
#address-cells = <1>;
194+
#size-cells = <0>;
195+
};
196+
197+
spi1: spi@1c06000 {
198+
compatible = "allwinner,sun8i-r40-spi",
199+
"allwinner,sun8i-h3-spi";
200+
reg = <0x01c06000 0x1000>;
201+
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
202+
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
203+
clock-names = "ahb", "mod";
204+
resets = <&ccu RST_BUS_SPI1>;
205+
status = "disabled";
206+
#address-cells = <1>;
207+
#size-cells = <0>;
208+
};
209+
184210
csi0: csi@1c09000 {
185211
compatible = "allwinner,sun8i-r40-csi0",
186212
"allwinner,sun7i-a20-csi0";
@@ -290,6 +316,19 @@
290316
resets = <&ccu RST_BUS_CE>;
291317
};
292318

319+
spi2: spi@1c17000 {
320+
compatible = "allwinner,sun8i-r40-spi",
321+
"allwinner,sun8i-h3-spi";
322+
reg = <0x01c17000 0x1000>;
323+
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
324+
clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
325+
clock-names = "ahb", "mod";
326+
resets = <&ccu RST_BUS_SPI2>;
327+
status = "disabled";
328+
#address-cells = <1>;
329+
#size-cells = <0>;
330+
};
331+
293332
ahci: sata@1c18000 {
294333
compatible = "allwinner,sun8i-r40-ahci";
295334
reg = <0x01c18000 0x1000>;
@@ -346,6 +385,19 @@
346385
status = "disabled";
347386
};
348387

388+
spi3: spi@1c1f000 {
389+
compatible = "allwinner,sun8i-r40-spi",
390+
"allwinner,sun8i-h3-spi";
391+
reg = <0x01c1f000 0x1000>;
392+
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
393+
clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
394+
clock-names = "ahb", "mod";
395+
resets = <&ccu RST_BUS_SPI3>;
396+
status = "disabled";
397+
#address-cells = <1>;
398+
#size-cells = <0>;
399+
};
400+
349401
ccu: clock@1c20000 {
350402
compatible = "allwinner,sun8i-r40-ccu";
351403
reg = <0x01c20000 0x400>;
@@ -663,58 +715,6 @@
663715
#size-cells = <0>;
664716
};
665717

666-
spi0: spi@1c05000 {
667-
compatible = "allwinner,sun8i-r40-spi",
668-
"allwinner,sun8i-h3-spi";
669-
reg = <0x01c05000 0x1000>;
670-
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
671-
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
672-
clock-names = "ahb", "mod";
673-
resets = <&ccu RST_BUS_SPI0>;
674-
status = "disabled";
675-
#address-cells = <1>;
676-
#size-cells = <0>;
677-
};
678-
679-
spi1: spi@1c06000 {
680-
compatible = "allwinner,sun8i-r40-spi",
681-
"allwinner,sun8i-h3-spi";
682-
reg = <0x01c06000 0x1000>;
683-
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
684-
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
685-
clock-names = "ahb", "mod";
686-
resets = <&ccu RST_BUS_SPI1>;
687-
status = "disabled";
688-
#address-cells = <1>;
689-
#size-cells = <0>;
690-
};
691-
692-
spi2: spi@1c17000 {
693-
compatible = "allwinner,sun8i-r40-spi",
694-
"allwinner,sun8i-h3-spi";
695-
reg = <0x01c17000 0x1000>;
696-
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
697-
clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
698-
clock-names = "ahb", "mod";
699-
resets = <&ccu RST_BUS_SPI2>;
700-
status = "disabled";
701-
#address-cells = <1>;
702-
#size-cells = <0>;
703-
};
704-
705-
spi3: spi@1c1f000 {
706-
compatible = "allwinner,sun8i-r40-spi",
707-
"allwinner,sun8i-h3-spi";
708-
reg = <0x01c1f000 0x1000>;
709-
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
710-
clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
711-
clock-names = "ahb", "mod";
712-
resets = <&ccu RST_BUS_SPI3>;
713-
status = "disabled";
714-
#address-cells = <1>;
715-
#size-cells = <0>;
716-
};
717-
718718
gmac: ethernet@1c50000 {
719719
compatible = "allwinner,sun8i-r40-gmac";
720720
syscon = <&ccu>;

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