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#define XILINX_CPM_PCIE_REG_PSCR_LNKUP BIT(11)
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/**
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- * struct xilinx_cpm_pcie_port - PCIe port information
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+ * struct xilinx_cpm_pcie - PCIe port information
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+ * @dev: Device pointer
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* @reg_base: Bridge Register Base
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* @cpm_base: CPM System Level Control and Status Register(SLCR) Base
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- * @dev: Device pointer
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* @intx_domain: Legacy IRQ domain pointer
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* @cpm_domain: CPM IRQ domain pointer
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* @cfg: Holds mappings of config space window
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* @intx_irq: legacy interrupt number
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* @irq: Error interrupt number
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* @lock: lock protecting shared register access
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*/
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- struct xilinx_cpm_pcie_port {
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+ struct xilinx_cpm_pcie {
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+ struct device * dev ;
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void __iomem * reg_base ;
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void __iomem * cpm_base ;
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- struct device * dev ;
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struct irq_domain * intx_domain ;
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struct irq_domain * cpm_domain ;
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struct pci_config_window * cfg ;
@@ -122,24 +122,24 @@ struct xilinx_cpm_pcie_port {
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raw_spinlock_t lock ;
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};
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- static u32 pcie_read (struct xilinx_cpm_pcie_port * port , u32 reg )
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+ static u32 pcie_read (struct xilinx_cpm_pcie * port , u32 reg )
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{
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return readl_relaxed (port -> reg_base + reg );
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}
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- static void pcie_write (struct xilinx_cpm_pcie_port * port ,
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+ static void pcie_write (struct xilinx_cpm_pcie * port ,
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u32 val , u32 reg )
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{
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writel_relaxed (val , port -> reg_base + reg );
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}
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- static bool cpm_pcie_link_up (struct xilinx_cpm_pcie_port * port )
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+ static bool cpm_pcie_link_up (struct xilinx_cpm_pcie * port )
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{
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return (pcie_read (port , XILINX_CPM_PCIE_REG_PSCR ) &
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XILINX_CPM_PCIE_REG_PSCR_LNKUP );
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}
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- static void cpm_pcie_clear_err_interrupts (struct xilinx_cpm_pcie_port * port )
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+ static void cpm_pcie_clear_err_interrupts (struct xilinx_cpm_pcie * port )
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{
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unsigned long val = pcie_read (port , XILINX_CPM_PCIE_REG_RPEFR );
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@@ -153,7 +153,7 @@ static void cpm_pcie_clear_err_interrupts(struct xilinx_cpm_pcie_port *port)
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static void xilinx_cpm_mask_leg_irq (struct irq_data * data )
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{
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- struct xilinx_cpm_pcie_port * port = irq_data_get_irq_chip_data (data );
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+ struct xilinx_cpm_pcie * port = irq_data_get_irq_chip_data (data );
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unsigned long flags ;
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u32 mask ;
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u32 val ;
@@ -167,7 +167,7 @@ static void xilinx_cpm_mask_leg_irq(struct irq_data *data)
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static void xilinx_cpm_unmask_leg_irq (struct irq_data * data )
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{
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- struct xilinx_cpm_pcie_port * port = irq_data_get_irq_chip_data (data );
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+ struct xilinx_cpm_pcie * port = irq_data_get_irq_chip_data (data );
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unsigned long flags ;
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u32 mask ;
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u32 val ;
@@ -211,7 +211,7 @@ static const struct irq_domain_ops intx_domain_ops = {
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static void xilinx_cpm_pcie_intx_flow (struct irq_desc * desc )
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{
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- struct xilinx_cpm_pcie_port * port = irq_desc_get_handler_data (desc );
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+ struct xilinx_cpm_pcie * port = irq_desc_get_handler_data (desc );
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struct irq_chip * chip = irq_desc_get_chip (desc );
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unsigned long val ;
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int i ;
@@ -229,7 +229,7 @@ static void xilinx_cpm_pcie_intx_flow(struct irq_desc *desc)
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static void xilinx_cpm_mask_event_irq (struct irq_data * d )
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{
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- struct xilinx_cpm_pcie_port * port = irq_data_get_irq_chip_data (d );
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+ struct xilinx_cpm_pcie * port = irq_data_get_irq_chip_data (d );
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u32 val ;
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raw_spin_lock (& port -> lock );
@@ -241,7 +241,7 @@ static void xilinx_cpm_mask_event_irq(struct irq_data *d)
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static void xilinx_cpm_unmask_event_irq (struct irq_data * d )
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{
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- struct xilinx_cpm_pcie_port * port = irq_data_get_irq_chip_data (d );
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+ struct xilinx_cpm_pcie * port = irq_data_get_irq_chip_data (d );
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u32 val ;
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raw_spin_lock (& port -> lock );
@@ -273,7 +273,7 @@ static const struct irq_domain_ops event_domain_ops = {
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static void xilinx_cpm_pcie_event_flow (struct irq_desc * desc )
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{
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- struct xilinx_cpm_pcie_port * port = irq_desc_get_handler_data (desc );
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+ struct xilinx_cpm_pcie * port = irq_desc_get_handler_data (desc );
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struct irq_chip * chip = irq_desc_get_chip (desc );
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unsigned long val ;
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int i ;
@@ -327,7 +327,7 @@ static const struct {
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static irqreturn_t xilinx_cpm_pcie_intr_handler (int irq , void * dev_id )
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{
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- struct xilinx_cpm_pcie_port * port = dev_id ;
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+ struct xilinx_cpm_pcie * port = dev_id ;
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struct device * dev = port -> dev ;
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struct irq_data * d ;
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@@ -350,7 +350,7 @@ static irqreturn_t xilinx_cpm_pcie_intr_handler(int irq, void *dev_id)
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return IRQ_HANDLED ;
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}
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- static void xilinx_cpm_free_irq_domains (struct xilinx_cpm_pcie_port * port )
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+ static void xilinx_cpm_free_irq_domains (struct xilinx_cpm_pcie * port )
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{
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if (port -> intx_domain ) {
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irq_domain_remove (port -> intx_domain );
@@ -369,7 +369,7 @@ static void xilinx_cpm_free_irq_domains(struct xilinx_cpm_pcie_port *port)
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*
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* Return: '0' on success and error value on failure
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*/
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- static int xilinx_cpm_pcie_init_irq_domain (struct xilinx_cpm_pcie_port * port )
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+ static int xilinx_cpm_pcie_init_irq_domain (struct xilinx_cpm_pcie * port )
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{
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struct device * dev = port -> dev ;
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struct device_node * node = dev -> of_node ;
@@ -410,7 +410,7 @@ static int xilinx_cpm_pcie_init_irq_domain(struct xilinx_cpm_pcie_port *port)
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return - ENOMEM ;
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}
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- static int xilinx_cpm_setup_irq (struct xilinx_cpm_pcie_port * port )
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+ static int xilinx_cpm_setup_irq (struct xilinx_cpm_pcie * port )
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{
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struct device * dev = port -> dev ;
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struct platform_device * pdev = to_platform_device (dev );
@@ -462,7 +462,7 @@ static int xilinx_cpm_setup_irq(struct xilinx_cpm_pcie_port *port)
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* xilinx_cpm_pcie_init_port - Initialize hardware
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* @port: PCIe port information
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*/
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- static void xilinx_cpm_pcie_init_port (struct xilinx_cpm_pcie_port * port )
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+ static void xilinx_cpm_pcie_init_port (struct xilinx_cpm_pcie * port )
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{
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if (cpm_pcie_link_up (port ))
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dev_info (port -> dev , "PCIe Link is UP\n" );
@@ -497,7 +497,7 @@ static void xilinx_cpm_pcie_init_port(struct xilinx_cpm_pcie_port *port)
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*
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* Return: '0' on success and error value on failure
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*/
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- static int xilinx_cpm_pcie_parse_dt (struct xilinx_cpm_pcie_port * port ,
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+ static int xilinx_cpm_pcie_parse_dt (struct xilinx_cpm_pcie * port ,
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struct resource * bus_range )
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{
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struct device * dev = port -> dev ;
@@ -523,7 +523,7 @@ static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie_port *port,
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return 0 ;
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}
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- static void xilinx_cpm_free_interrupts (struct xilinx_cpm_pcie_port * port )
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+ static void xilinx_cpm_free_interrupts (struct xilinx_cpm_pcie * port )
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{
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irq_set_chained_handler_and_data (port -> intx_irq , NULL , NULL );
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irq_set_chained_handler_and_data (port -> irq , NULL , NULL );
@@ -537,7 +537,7 @@ static void xilinx_cpm_free_interrupts(struct xilinx_cpm_pcie_port *port)
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*/
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static int xilinx_cpm_pcie_probe (struct platform_device * pdev )
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{
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- struct xilinx_cpm_pcie_port * port ;
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+ struct xilinx_cpm_pcie * port ;
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struct device * dev = & pdev -> dev ;
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struct pci_host_bridge * bridge ;
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struct resource_entry * bus ;
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