drm/amd/display: Reset scrambling on Test Pattern

Chris Park · alexdeucher · commit db0473f62438 · 2020-08-18T18:00:51.000-04:00
[Why]
Programming is missing the sequence where for eDP the scrambling is
reset when testing for eye diagram test pattern.

[How]
Include the required register in the definition

Signed-off-by: Chris Park &lt;Chris.Park@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
 [id] = {\
 	LE_DCN3_REG_LIST(id), \
 	UNIPHY_DCN2_REG_LIST(phyid), \
+	SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
 }
 
 static const struct dce110_aux_registers_shift aux_shift = {

Original file line number	Diff line number	Diff line change
`@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {`
`491`	`491`	`[id] = {\`
`492`	`492`	`LE_DCN3_REG_LIST(id), \`
`493`	`493`	`UNIPHY_DCN2_REG_LIST(phyid), \`
	`494`	`+ SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \`
`494`	`495`	`}`
`495`	`496`
`496`	`497`	`static const struct dce110_aux_registers_shift aux_shift = {`