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Merge tag 'riscv-for-linus-5.9-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt: "Two fixes for this week: - The addition of a symbol export for clint_time_val, which has been inlined into some timex functions and can be used by drivers. - A fix to avoid calling get_cycles() before the timers have been probed. These both only effect !MMU systems" * tag 'riscv-for-linus-5.9-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: Check clint_time_val before use clocksource: clint: Export clint_time_val for modules
2 parents 4e3b9ce + aa98876 commit db23baa

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arch/riscv/include/asm/stackprotector.h

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@@ -5,7 +5,6 @@
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#include <linux/random.h>
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#include <linux/version.h>
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#include <asm/timex.h>
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extern unsigned long __stack_chk_guard;
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@@ -18,12 +17,9 @@ extern unsigned long __stack_chk_guard;
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static __always_inline void boot_init_stack_canary(void)
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{
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unsigned long canary;
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unsigned long tsc;
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/* Try to get a semi random initial value. */
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get_random_bytes(&canary, sizeof(canary));
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tsc = get_cycles();
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canary += tsc + (tsc << BITS_PER_LONG/2);
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canary ^= LINUX_VERSION_CODE;
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canary &= CANARY_MASK;
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arch/riscv/include/asm/timex.h

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@@ -33,6 +33,19 @@ static inline u32 get_cycles_hi(void)
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#define get_cycles_hi get_cycles_hi
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#endif /* CONFIG_64BIT */
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/*
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* Much like MIPS, we may not have a viable counter to use at an early point
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* in the boot process. Unfortunately we don't have a fallback, so instead
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* we just return 0.
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*/
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static inline unsigned long random_get_entropy(void)
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{
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if (unlikely(clint_time_val == NULL))
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return 0;
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return get_cycles();
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}
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#define random_get_entropy() random_get_entropy()
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#else /* CONFIG_RISCV_M_MODE */
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static inline cycles_t get_cycles(void)

drivers/clocksource/timer-clint.c

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@@ -38,6 +38,7 @@ static unsigned int clint_timer_irq;
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#ifdef CONFIG_RISCV_M_MODE
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u64 __iomem *clint_time_val;
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EXPORT_SYMBOL(clint_time_val);
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#endif
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static void clint_send_ipi(const struct cpumask *target)

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