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Chun-Jie Chenmbgg
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soc: mediatek: pm-domains: Fix the power glitch issue
Power reset maybe generate unexpected signal. In order to avoid the glitch issue, we need to enable isolation first to guarantee the stable signal when power reset is triggered. Fixes: 59b644b ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Chun-Jie Chen <[email protected]> Signed-off-by: Allen-KH Cheng <[email protected]> Reviewed-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Miles Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
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drivers/soc/mediatek/mtk-pm-domains.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -275,9 +275,9 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
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clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
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/* subsys power off */
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regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
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regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
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regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);
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regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
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regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);
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regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);
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