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Merge tag 'timers-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timekeeping and timer updates from Thomas Gleixner: "Core: - Consolidation of the vDSO build infrastructure to address the difficulties of cross-builds for ARM64 compat vDSO libraries by restricting the exposure of header content to the vDSO build. This is achieved by splitting out header content into separate headers. which contain only the minimaly required information which is necessary to build the vDSO. These new headers are included from the kernel headers and the vDSO specific files. - Enhancements to the generic vDSO library allowing more fine grained control over the compiled in code, further reducing architecture specific storage and preparing for adopting the generic library by PPC. - Cleanup and consolidation of the exit related code in posix CPU timers. - Small cleanups and enhancements here and there Drivers: - The obligatory new drivers: Ingenic JZ47xx and X1000 TCU support - Correct the clock rate of PIT64b global clock - setup_irq() cleanup - Preparation for PWM and suspend support for the TI DM timer - Expand the fttmr010 driver to support ast2600 systems - The usual small fixes, enhancements and cleanups all over the place" * tag 'timers-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (80 commits) Revert "clocksource/drivers/timer-probe: Avoid creating dead devices" vdso: Fix clocksource.h macro detection um: Fix header inclusion arm64: vdso32: Enable Clang Compilation lib/vdso: Enable common headers arm: vdso: Enable arm to use common headers x86/vdso: Enable x86 to use common headers mips: vdso: Enable mips to use common headers arm64: vdso32: Include common headers in the vdso library arm64: vdso: Include common headers in the vdso library arm64: Introduce asm/vdso/processor.h arm64: vdso32: Code clean up linux/elfnote.h: Replace elf.h with UAPI equivalent scripts: Fix the inclusion order in modpost common: Introduce processor.h linux/ktime.h: Extract common header for vDSO linux/jiffies.h: Extract common header for vDSO linux/time64.h: Extract common header for vDSO linux/time32.h: Extract common header for vDSO linux/time.h: Extract common header for vDSO ...
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‎Documentation/devicetree/bindings/timer/faraday,fttmr010.txt

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@@ -11,6 +11,7 @@ Required properties:
1111
"moxa,moxart-timer", "faraday,fttmr010"
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"aspeed,ast2400-timer"
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"aspeed,ast2500-timer"
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"aspeed,ast2600-timer"
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- reg : Should contain registers location and length
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- interrupts : Should contain the three timer interrupts usually with

‎Documentation/devicetree/bindings/timer/ingenic,tcu.txt

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@@ -10,6 +10,7 @@ Required properties:
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* ingenic,jz4740-tcu
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* ingenic,jz4725b-tcu
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* ingenic,jz4770-tcu
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* ingenic,x1000-tcu
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followed by "simple-mfd".
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- reg: Should be the offset/length value corresponding to the TCU registers
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- clocks: List of phandle & clock specifiers for clocks external to the TCU.

‎arch/arm/Kconfig

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@@ -3,7 +3,6 @@ config ARM
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bool
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default y
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select ARCH_32BIT_OFF_T
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select ARCH_CLOCKSOURCE_DATA
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select ARCH_HAS_BINFMT_FLAT
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select ARCH_HAS_DEBUG_VIRTUAL if MMU
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select ARCH_HAS_DEVMEM_IS_ALLOWED

‎arch/arm/include/asm/clocksource.h

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@@ -1,8 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_CLOCKSOURCE_H
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#define _ASM_CLOCKSOURCE_H
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struct arch_clocksource_data {
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bool vdso_direct; /* Usable for direct VDSO access? */
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};
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#include <asm/vdso/clocksource.h>
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#endif
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#endif /* _ASM_CLOCKSOURCE_H */

‎arch/arm/include/asm/cp15.h

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@@ -50,25 +50,7 @@
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#ifdef CONFIG_CPU_CP15
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#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
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"mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
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#define __ACCESS_CP15_64(Op1, CRm) \
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"mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
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#define __read_sysreg(r, w, c, t) ({ \
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t __val; \
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asm volatile(r " " c : "=r" (__val)); \
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__val; \
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})
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#define read_sysreg(...) __read_sysreg(__VA_ARGS__)
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#define __write_sysreg(v, r, w, c, t) asm volatile(w " " c : : "r" ((t)(v)))
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#define write_sysreg(v, ...) __write_sysreg(v, __VA_ARGS__)
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#define BPIALL __ACCESS_CP15(c7, 0, c5, 6)
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#define ICIALLU __ACCESS_CP15(c7, 0, c5, 0)
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#define CNTVCT __ACCESS_CP15_64(1, c14)
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#include <asm/vdso/cp15.h>
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extern unsigned long cr_alignment; /* defined in entry-armv.S */
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‎arch/arm/include/asm/processor.h

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@@ -14,6 +14,7 @@
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#include <asm/unified.h>
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#include <asm/vdso/processor.h>
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#ifdef __KERNEL__
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#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
@@ -85,16 +86,6 @@ extern void release_thread(struct task_struct *);
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unsigned long get_wchan(struct task_struct *p);
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#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
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#define cpu_relax() \
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do { \
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smp_mb(); \
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__asm__ __volatile__("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop;"); \
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} while (0)
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#else
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#define cpu_relax() barrier()
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#endif
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#define task_pt_regs(p) \
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((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
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‎arch/arm/include/asm/vdso/clocksource.h

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@@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_VDSOCLOCKSOURCE_H
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#define __ASM_VDSOCLOCKSOURCE_H
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#define VDSO_ARCH_CLOCKMODES \
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VDSO_CLOCKMODE_ARCHTIMER
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#endif /* __ASM_VDSOCLOCKSOURCE_H */

‎arch/arm/include/asm/vdso/cp15.h

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@@ -0,0 +1,38 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 ARM Ltd.
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*/
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#ifndef __ASM_VDSO_CP15_H
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#define __ASM_VDSO_CP15_H
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_CPU_CP15
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#include <linux/stringify.h>
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#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
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"mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
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#define __ACCESS_CP15_64(Op1, CRm) \
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"mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
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#define __read_sysreg(r, w, c, t) ({ \
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t __val; \
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asm volatile(r " " c : "=r" (__val)); \
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__val; \
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})
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#define read_sysreg(...) __read_sysreg(__VA_ARGS__)
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#define __write_sysreg(v, r, w, c, t) asm volatile(w " " c : : "r" ((t)(v)))
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#define write_sysreg(v, ...) __write_sysreg(v, __VA_ARGS__)
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#define BPIALL __ACCESS_CP15(c7, 0, c5, 6)
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#define ICIALLU __ACCESS_CP15(c7, 0, c5, 0)
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#define CNTVCT __ACCESS_CP15_64(1, c14)
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#endif /* CONFIG_CPU_CP15 */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_VDSO_CP15_H */

‎arch/arm/include/asm/vdso/gettimeofday.h

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#ifndef __ASSEMBLY__
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#include <asm/barrier.h>
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#include <asm/cp15.h>
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#include <asm/errno.h>
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#include <asm/unistd.h>
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#include <asm/vdso/cp15.h>
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#include <uapi/linux/time.h>
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#define VDSO_HAS_CLOCK_GETRES 1
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return ret;
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}
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static inline bool arm_vdso_hres_capable(void)
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{
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return IS_ENABLED(CONFIG_ARM_ARCH_TIMER);
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}
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#define __arch_vdso_hres_capable arm_vdso_hres_capable
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static __always_inline u64 __arch_get_hw_counter(int clock_mode)
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{
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#ifdef CONFIG_ARM_ARCH_TIMER
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u64 cycle_now;
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if (!clock_mode)
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return -EINVAL;
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/*
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* Core checks for mode already, so this raced against a concurrent
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* update. Return something. Core will do another round and then
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* see the mode change and fallback to the syscall.
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*/
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if (clock_mode == VDSO_CLOCKMODE_NONE)
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return 0;
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isb();
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cycle_now = read_sysreg(CNTVCT);
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return cycle_now;
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#else
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return -EINVAL; /* use fallback */
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/* Make GCC happy. This is compiled out anyway */
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return 0;
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#endif
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}
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‎arch/arm/include/asm/vdso/processor.h

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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 ARM Ltd.
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*/
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#ifndef __ASM_VDSO_PROCESSOR_H
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#define __ASM_VDSO_PROCESSOR_H
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#ifndef __ASSEMBLY__
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#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
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#define cpu_relax() \
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do { \
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smp_mb(); \
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__asm__ __volatile__("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop;"); \
15+
} while (0)
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#else
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#define cpu_relax() barrier()
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_VDSO_PROCESSOR_H */

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