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x86/sev: Get rid of excessive use of defines
Remove all the defines of masks and bit positions for the GHCB MSR protocol and use comments instead which correspond directly to the spec so that following those can be a lot easier and straightforward with the spec opened in parallel to the code. Aligh vertically while at it. No functional changes. Signed-off-by: Borislav Petkov <[email protected]> Signed-off-by: Brijesh Singh <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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arch/x86/include/asm/sev-common.h

Lines changed: 28 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -18,20 +18,19 @@
1818
/* SEV Information Request/Response */
1919
#define GHCB_MSR_SEV_INFO_RESP 0x001
2020
#define GHCB_MSR_SEV_INFO_REQ 0x002
21-
#define GHCB_MSR_VER_MAX_POS 48
22-
#define GHCB_MSR_VER_MAX_MASK 0xffff
23-
#define GHCB_MSR_VER_MIN_POS 32
24-
#define GHCB_MSR_VER_MIN_MASK 0xffff
25-
#define GHCB_MSR_CBIT_POS 24
26-
#define GHCB_MSR_CBIT_MASK 0xff
27-
#define GHCB_MSR_SEV_INFO(_max, _min, _cbit) \
28-
((((_max) & GHCB_MSR_VER_MAX_MASK) << GHCB_MSR_VER_MAX_POS) | \
29-
(((_min) & GHCB_MSR_VER_MIN_MASK) << GHCB_MSR_VER_MIN_POS) | \
30-
(((_cbit) & GHCB_MSR_CBIT_MASK) << GHCB_MSR_CBIT_POS) | \
21+
22+
#define GHCB_MSR_SEV_INFO(_max, _min, _cbit) \
23+
/* GHCBData[63:48] */ \
24+
((((_max) & 0xffff) << 48) | \
25+
/* GHCBData[47:32] */ \
26+
(((_min) & 0xffff) << 32) | \
27+
/* GHCBData[31:24] */ \
28+
(((_cbit) & 0xff) << 24) | \
3129
GHCB_MSR_SEV_INFO_RESP)
30+
3231
#define GHCB_MSR_INFO(v) ((v) & 0xfffUL)
33-
#define GHCB_MSR_PROTO_MAX(v) (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK)
34-
#define GHCB_MSR_PROTO_MIN(v) (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK)
32+
#define GHCB_MSR_PROTO_MAX(v) (((v) >> 48) & 0xffff)
33+
#define GHCB_MSR_PROTO_MIN(v) (((v) >> 32) & 0xffff)
3534

3635
/* CPUID Request/Response */
3736
#define GHCB_MSR_CPUID_REQ 0x004
@@ -46,27 +45,33 @@
4645
#define GHCB_CPUID_REQ_EBX 1
4746
#define GHCB_CPUID_REQ_ECX 2
4847
#define GHCB_CPUID_REQ_EDX 3
49-
#define GHCB_CPUID_REQ(fn, reg) \
50-
(GHCB_MSR_CPUID_REQ | \
51-
(((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \
52-
(((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS))
48+
#define GHCB_CPUID_REQ(fn, reg) \
49+
/* GHCBData[11:0] */ \
50+
(GHCB_MSR_CPUID_REQ | \
51+
/* GHCBData[31:12] */ \
52+
(((unsigned long)(reg) & 0x3) << 30) | \
53+
/* GHCBData[63:32] */ \
54+
(((unsigned long)fn) << 32))
5355

5456
/* AP Reset Hold */
55-
#define GHCB_MSR_AP_RESET_HOLD_REQ 0x006
56-
#define GHCB_MSR_AP_RESET_HOLD_RESP 0x007
57+
#define GHCB_MSR_AP_RESET_HOLD_REQ 0x006
58+
#define GHCB_MSR_AP_RESET_HOLD_RESP 0x007
5759

5860
/* GHCB Hypervisor Feature Request/Response */
59-
#define GHCB_MSR_HV_FT_REQ 0x080
60-
#define GHCB_MSR_HV_FT_RESP 0x081
61+
#define GHCB_MSR_HV_FT_REQ 0x080
62+
#define GHCB_MSR_HV_FT_RESP 0x081
6163

6264
#define GHCB_MSR_TERM_REQ 0x100
6365
#define GHCB_MSR_TERM_REASON_SET_POS 12
6466
#define GHCB_MSR_TERM_REASON_SET_MASK 0xf
6567
#define GHCB_MSR_TERM_REASON_POS 16
6668
#define GHCB_MSR_TERM_REASON_MASK 0xff
67-
#define GHCB_SEV_TERM_REASON(reason_set, reason_val) \
68-
(((((u64)reason_set) & GHCB_MSR_TERM_REASON_SET_MASK) << GHCB_MSR_TERM_REASON_SET_POS) | \
69-
((((u64)reason_val) & GHCB_MSR_TERM_REASON_MASK) << GHCB_MSR_TERM_REASON_POS))
69+
70+
#define GHCB_SEV_TERM_REASON(reason_set, reason_val) \
71+
/* GHCBData[15:12] */ \
72+
(((((u64)reason_set) & 0xf) << 12) | \
73+
/* GHCBData[23:16] */ \
74+
((((u64)reason_val) & 0xff) << 16))
7075

7176
#define GHCB_SEV_ES_GEN_REQ 0
7277
#define GHCB_SEV_ES_PROT_UNSUPPORTED 1

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