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riscv: hwprobe: export Zfa ISA extension
Export Zfa ISA extension[1] through hwprobe. Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1] Signed-off-by: Clément Léger <[email protected]> Reviewed-by: Evan Green <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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Documentation/arch/riscv/hwprobe.rst

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@@ -157,6 +157,10 @@ The following keys are defined:
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defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
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("Remove draft warnings from Zvfh[min]").
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* :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
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defined in the RISC-V ISA manual starting from commit 056b6ff467c7
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("Zfa is ratified").
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* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
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information about the selected set of processors.
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arch/riscv/include/uapi/asm/hwprobe.h

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@@ -55,6 +55,7 @@ struct riscv_hwprobe {
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#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
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#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
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#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31)
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#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
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#define RISCV_HWPROBE_KEY_CPUPERF_0 5
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#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
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#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)

arch/riscv/kernel/sys_riscv.c

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@@ -193,6 +193,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
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if (has_fpu()) {
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EXT_KEY(ZFH);
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EXT_KEY(ZFHMIN);
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EXT_KEY(ZFA);
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}
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#undef EXT_KEY
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}

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