Skip to content

Commit dd58318

Browse files
Abhishek SahuLorenzo Pieralisi
authored andcommitted
PCI: qcom: Change duplicate PCI reset to phy reset
The deinit issues reset_control_assert for PCI twice and does not contain phy reset. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abhishek Sahu <[email protected]> Signed-off-by: Ansuel Smith <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Stanimir Varbanov <[email protected]>
1 parent 736ae5c commit dd58318

File tree

1 file changed

+8
-10
lines changed

1 file changed

+8
-10
lines changed

drivers/pci/controller/dwc/pcie-qcom.c

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -280,14 +280,14 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
280280
{
281281
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
282282

283+
clk_disable_unprepare(res->phy_clk);
283284
reset_control_assert(res->pci_reset);
284285
reset_control_assert(res->axi_reset);
285286
reset_control_assert(res->ahb_reset);
286287
reset_control_assert(res->por_reset);
287-
reset_control_assert(res->pci_reset);
288+
reset_control_assert(res->phy_reset);
288289
clk_disable_unprepare(res->iface_clk);
289290
clk_disable_unprepare(res->core_clk);
290-
clk_disable_unprepare(res->phy_clk);
291291
clk_disable_unprepare(res->aux_clk);
292292
clk_disable_unprepare(res->ref_clk);
293293
regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
@@ -325,12 +325,6 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
325325
goto err_clk_core;
326326
}
327327

328-
ret = clk_prepare_enable(res->phy_clk);
329-
if (ret) {
330-
dev_err(dev, "cannot prepare/enable phy clock\n");
331-
goto err_clk_phy;
332-
}
333-
334328
ret = clk_prepare_enable(res->aux_clk);
335329
if (ret) {
336330
dev_err(dev, "cannot prepare/enable aux clock\n");
@@ -383,6 +377,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
383377
return ret;
384378
}
385379

380+
ret = clk_prepare_enable(res->phy_clk);
381+
if (ret) {
382+
dev_err(dev, "cannot prepare/enable phy clock\n");
383+
goto err_deassert_ahb;
384+
}
385+
386386
/* wait for clock acquisition */
387387
usleep_range(1000, 1500);
388388

@@ -400,8 +400,6 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
400400
err_clk_ref:
401401
clk_disable_unprepare(res->aux_clk);
402402
err_clk_aux:
403-
clk_disable_unprepare(res->phy_clk);
404-
err_clk_phy:
405403
clk_disable_unprepare(res->core_clk);
406404
err_clk_core:
407405
clk_disable_unprepare(res->iface_clk);

0 commit comments

Comments
 (0)