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dmaengine: stm32-mdma: Use bitfield helpers
Use the FIELD_{GET,PREP}() helpers, instead of defining custom macros implementing the same operations. Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/36ceab242a594233dc7dc6f1dddb4ac32d1e846f.1637593297.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <[email protected]>
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‎drivers/dma/stm32-mdma.c

Lines changed: 23 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
* Inspired by stm32-dma.c and dma-jz4780.c
1111
*/
1212

13+
#include <linux/bitfield.h>
1314
#include <linux/clk.h>
1415
#include <linux/delay.h>
1516
#include <linux/dmaengine.h>
@@ -32,13 +33,6 @@
3233

3334
#include "virt-dma.h"
3435

35-
/* MDMA Generic getter/setter */
36-
#define STM32_MDMA_SHIFT(n) (ffs(n) - 1)
37-
#define STM32_MDMA_SET(n, mask) (((n) << STM32_MDMA_SHIFT(mask)) & \
38-
(mask))
39-
#define STM32_MDMA_GET(n, mask) (((n) & (mask)) >> \
40-
STM32_MDMA_SHIFT(mask))
41-
4236
#define STM32_MDMA_GISR0 0x0000 /* MDMA Int Status Reg 1 */
4337
#define STM32_MDMA_GISR1 0x0004 /* MDMA Int Status Reg 2 */
4438

@@ -80,8 +74,7 @@
8074
#define STM32_MDMA_CCR_HEX BIT(13)
8175
#define STM32_MDMA_CCR_BEX BIT(12)
8276
#define STM32_MDMA_CCR_PL_MASK GENMASK(7, 6)
83-
#define STM32_MDMA_CCR_PL(n) STM32_MDMA_SET(n, \
84-
STM32_MDMA_CCR_PL_MASK)
77+
#define STM32_MDMA_CCR_PL(n) FIELD_PREP(STM32_MDMA_CCR_PL_MASK, (n))
8578
#define STM32_MDMA_CCR_TCIE BIT(5)
8679
#define STM32_MDMA_CCR_BTIE BIT(4)
8780
#define STM32_MDMA_CCR_BRTIE BIT(3)
@@ -99,48 +92,33 @@
9992
#define STM32_MDMA_CTCR_BWM BIT(31)
10093
#define STM32_MDMA_CTCR_SWRM BIT(30)
10194
#define STM32_MDMA_CTCR_TRGM_MSK GENMASK(29, 28)
102-
#define STM32_MDMA_CTCR_TRGM(n) STM32_MDMA_SET((n), \
103-
STM32_MDMA_CTCR_TRGM_MSK)
104-
#define STM32_MDMA_CTCR_TRGM_GET(n) STM32_MDMA_GET((n), \
105-
STM32_MDMA_CTCR_TRGM_MSK)
95+
#define STM32_MDMA_CTCR_TRGM(n) FIELD_PREP(STM32_MDMA_CTCR_TRGM_MSK, (n))
96+
#define STM32_MDMA_CTCR_TRGM_GET(n) FIELD_GET(STM32_MDMA_CTCR_TRGM_MSK, (n))
10697
#define STM32_MDMA_CTCR_PAM_MASK GENMASK(27, 26)
107-
#define STM32_MDMA_CTCR_PAM(n) STM32_MDMA_SET(n, \
108-
STM32_MDMA_CTCR_PAM_MASK)
98+
#define STM32_MDMA_CTCR_PAM(n) FIELD_PREP(STM32_MDMA_CTCR_PAM_MASK, (n))
10999
#define STM32_MDMA_CTCR_PKE BIT(25)
110100
#define STM32_MDMA_CTCR_TLEN_MSK GENMASK(24, 18)
111-
#define STM32_MDMA_CTCR_TLEN(n) STM32_MDMA_SET((n), \
112-
STM32_MDMA_CTCR_TLEN_MSK)
113-
#define STM32_MDMA_CTCR_TLEN_GET(n) STM32_MDMA_GET((n), \
114-
STM32_MDMA_CTCR_TLEN_MSK)
101+
#define STM32_MDMA_CTCR_TLEN(n) FIELD_PREP(STM32_MDMA_CTCR_TLEN_MSK, (n))
102+
#define STM32_MDMA_CTCR_TLEN_GET(n) FIELD_GET(STM32_MDMA_CTCR_TLEN_MSK, (n))
115103
#define STM32_MDMA_CTCR_LEN2_MSK GENMASK(25, 18)
116-
#define STM32_MDMA_CTCR_LEN2(n) STM32_MDMA_SET((n), \
117-
STM32_MDMA_CTCR_LEN2_MSK)
118-
#define STM32_MDMA_CTCR_LEN2_GET(n) STM32_MDMA_GET((n), \
119-
STM32_MDMA_CTCR_LEN2_MSK)
104+
#define STM32_MDMA_CTCR_LEN2(n) FIELD_PREP(STM32_MDMA_CTCR_LEN2_MSK, (n))
105+
#define STM32_MDMA_CTCR_LEN2_GET(n) FIELD_GET(STM32_MDMA_CTCR_LEN2_MSK, (n))
120106
#define STM32_MDMA_CTCR_DBURST_MASK GENMASK(17, 15)
121-
#define STM32_MDMA_CTCR_DBURST(n) STM32_MDMA_SET(n, \
122-
STM32_MDMA_CTCR_DBURST_MASK)
107+
#define STM32_MDMA_CTCR_DBURST(n) FIELD_PREP(STM32_MDMA_CTCR_DBURST_MASK, (n))
123108
#define STM32_MDMA_CTCR_SBURST_MASK GENMASK(14, 12)
124-
#define STM32_MDMA_CTCR_SBURST(n) STM32_MDMA_SET(n, \
125-
STM32_MDMA_CTCR_SBURST_MASK)
109+
#define STM32_MDMA_CTCR_SBURST(n) FIELD_PREP(STM32_MDMA_CTCR_SBURST_MASK, (n))
126110
#define STM32_MDMA_CTCR_DINCOS_MASK GENMASK(11, 10)
127-
#define STM32_MDMA_CTCR_DINCOS(n) STM32_MDMA_SET((n), \
128-
STM32_MDMA_CTCR_DINCOS_MASK)
111+
#define STM32_MDMA_CTCR_DINCOS(n) FIELD_PREP(STM32_MDMA_CTCR_DINCOS_MASK, (n))
129112
#define STM32_MDMA_CTCR_SINCOS_MASK GENMASK(9, 8)
130-
#define STM32_MDMA_CTCR_SINCOS(n) STM32_MDMA_SET((n), \
131-
STM32_MDMA_CTCR_SINCOS_MASK)
113+
#define STM32_MDMA_CTCR_SINCOS(n) FIELD_PREP(STM32_MDMA_CTCR_SINCOS_MASK, (n))
132114
#define STM32_MDMA_CTCR_DSIZE_MASK GENMASK(7, 6)
133-
#define STM32_MDMA_CTCR_DSIZE(n) STM32_MDMA_SET(n, \
134-
STM32_MDMA_CTCR_DSIZE_MASK)
115+
#define STM32_MDMA_CTCR_DSIZE(n) FIELD_PREP(STM32_MDMA_CTCR_DSIZE_MASK, (n))
135116
#define STM32_MDMA_CTCR_SSIZE_MASK GENMASK(5, 4)
136-
#define STM32_MDMA_CTCR_SSIZE(n) STM32_MDMA_SET(n, \
137-
STM32_MDMA_CTCR_SSIZE_MASK)
117+
#define STM32_MDMA_CTCR_SSIZE(n) FIELD_PREP(STM32_MDMA_CTCR_SSIZE_MASK, (n))
138118
#define STM32_MDMA_CTCR_DINC_MASK GENMASK(3, 2)
139-
#define STM32_MDMA_CTCR_DINC(n) STM32_MDMA_SET((n), \
140-
STM32_MDMA_CTCR_DINC_MASK)
119+
#define STM32_MDMA_CTCR_DINC(n) FIELD_PREP(STM32_MDMA_CTCR_DINC_MASK, (n))
141120
#define STM32_MDMA_CTCR_SINC_MASK GENMASK(1, 0)
142-
#define STM32_MDMA_CTCR_SINC(n) STM32_MDMA_SET((n), \
143-
STM32_MDMA_CTCR_SINC_MASK)
121+
#define STM32_MDMA_CTCR_SINC(n) FIELD_PREP(STM32_MDMA_CTCR_SINC_MASK, (n))
144122
#define STM32_MDMA_CTCR_CFG_MASK (STM32_MDMA_CTCR_SINC_MASK \
145123
| STM32_MDMA_CTCR_DINC_MASK \
146124
| STM32_MDMA_CTCR_SINCOS_MASK \
@@ -151,16 +129,13 @@
151129
/* MDMA Channel x block number of data register */
152130
#define STM32_MDMA_CBNDTR(x) (0x54 + 0x40 * (x))
153131
#define STM32_MDMA_CBNDTR_BRC_MK GENMASK(31, 20)
154-
#define STM32_MDMA_CBNDTR_BRC(n) STM32_MDMA_SET(n, \
155-
STM32_MDMA_CBNDTR_BRC_MK)
156-
#define STM32_MDMA_CBNDTR_BRC_GET(n) STM32_MDMA_GET((n), \
157-
STM32_MDMA_CBNDTR_BRC_MK)
132+
#define STM32_MDMA_CBNDTR_BRC(n) FIELD_PREP(STM32_MDMA_CBNDTR_BRC_MK, (n))
133+
#define STM32_MDMA_CBNDTR_BRC_GET(n) FIELD_GET(STM32_MDMA_CBNDTR_BRC_MK, (n))
158134

159135
#define STM32_MDMA_CBNDTR_BRDUM BIT(19)
160136
#define STM32_MDMA_CBNDTR_BRSUM BIT(18)
161137
#define STM32_MDMA_CBNDTR_BNDT_MASK GENMASK(16, 0)
162-
#define STM32_MDMA_CBNDTR_BNDT(n) STM32_MDMA_SET(n, \
163-
STM32_MDMA_CBNDTR_BNDT_MASK)
138+
#define STM32_MDMA_CBNDTR_BNDT(n) FIELD_PREP(STM32_MDMA_CBNDTR_BNDT_MASK, (n))
164139

165140
/* MDMA Channel x source address register */
166141
#define STM32_MDMA_CSAR(x) (0x58 + 0x40 * (x))
@@ -171,11 +146,9 @@
171146
/* MDMA Channel x block repeat address update register */
172147
#define STM32_MDMA_CBRUR(x) (0x60 + 0x40 * (x))
173148
#define STM32_MDMA_CBRUR_DUV_MASK GENMASK(31, 16)
174-
#define STM32_MDMA_CBRUR_DUV(n) STM32_MDMA_SET(n, \
175-
STM32_MDMA_CBRUR_DUV_MASK)
149+
#define STM32_MDMA_CBRUR_DUV(n) FIELD_PREP(STM32_MDMA_CBRUR_DUV_MASK, (n))
176150
#define STM32_MDMA_CBRUR_SUV_MASK GENMASK(15, 0)
177-
#define STM32_MDMA_CBRUR_SUV(n) STM32_MDMA_SET(n, \
178-
STM32_MDMA_CBRUR_SUV_MASK)
151+
#define STM32_MDMA_CBRUR_SUV(n) FIELD_PREP(STM32_MDMA_CBRUR_SUV_MASK, (n))
179152

180153
/* MDMA Channel x link address register */
181154
#define STM32_MDMA_CLAR(x) (0x64 + 0x40 * (x))
@@ -185,8 +158,7 @@
185158
#define STM32_MDMA_CTBR_DBUS BIT(17)
186159
#define STM32_MDMA_CTBR_SBUS BIT(16)
187160
#define STM32_MDMA_CTBR_TSEL_MASK GENMASK(7, 0)
188-
#define STM32_MDMA_CTBR_TSEL(n) STM32_MDMA_SET(n, \
189-
STM32_MDMA_CTBR_TSEL_MASK)
161+
#define STM32_MDMA_CTBR_TSEL(n) FIELD_PREP(STM32_MDMA_CTBR_TSEL_MASK, (n))
190162

191163
/* MDMA Channel x mask address register */
192164
#define STM32_MDMA_CMAR(x) (0x70 + 0x40 * (x))

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