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Add support for CPU frequency scaling on Tegra194. The frequency
of each core can be adjusted by writing a clock divisor value to
a MSR on the core. The range of valid divisors is queried from
the BPMP.
Signed-off-by: Mikko Perttunen <[email protected]>
Signed-off-by: Sumit Gupta <[email protected]>
Signed-off-by: Viresh Kumar <[email protected]>
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