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suganathprabu0512martinkpetersen
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scsi: mpt3sas: Use 63-bit DMA addressing on SAS35 HBA
Although SAS3 & SAS3.5 IT HBA controllers support 64-bit DMA addressing, as per hardware design, if DMA-able range contains all 64-bits set (0xFFFFFFFF-FFFFFFFF) then it results in a firmware fault. E.g. SGE's start address is 0xFFFFFFFF-FFFF000 and data length is 0x1000 bytes. when HBA tries to DMA the data at 0xFFFFFFFF-FFFFFFFF location then HBA will fault the firmware. Driver will set 63-bit DMA mask to ensure the above address will not be used. Cc: <[email protected]> # 5.1.20+ Signed-off-by: Suganath Prabu <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Martin K. Petersen <[email protected]>
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drivers/scsi/mpt3sas/mpt3sas_base.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2703,6 +2703,8 @@ _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
27032703
{
27042704
u64 required_mask, coherent_mask;
27052705
struct sysinfo s;
2706+
/* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */
2707+
int dma_mask = (ioc->hba_mpi_version_belonged > MPI2_VERSION) ? 63 : 64;
27062708

27072709
if (ioc->is_mcpu_endpoint)
27082710
goto try_32bit;
@@ -2712,17 +2714,17 @@ _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
27122714
goto try_32bit;
27132715

27142716
if (ioc->dma_mask)
2715-
coherent_mask = DMA_BIT_MASK(64);
2717+
coherent_mask = DMA_BIT_MASK(dma_mask);
27162718
else
27172719
coherent_mask = DMA_BIT_MASK(32);
27182720

2719-
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
2721+
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(dma_mask)) ||
27202722
dma_set_coherent_mask(&pdev->dev, coherent_mask))
27212723
goto try_32bit;
27222724

27232725
ioc->base_add_sg_single = &_base_add_sg_single_64;
27242726
ioc->sge_size = sizeof(Mpi2SGESimple64_t);
2725-
ioc->dma_mask = 64;
2727+
ioc->dma_mask = dma_mask;
27262728
goto out;
27272729

27282730
try_32bit:
@@ -2744,7 +2746,7 @@ static int
27442746
_base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
27452747
struct pci_dev *pdev)
27462748
{
2747-
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
2749+
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ioc->dma_mask))) {
27482750
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
27492751
return -ENODEV;
27502752
}
@@ -4989,7 +4991,7 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc)
49894991
total_sz += sz;
49904992
} while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
49914993

4992-
if (ioc->dma_mask == 64) {
4994+
if (ioc->dma_mask > 32) {
49934995
if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
49944996
ioc_warn(ioc, "no suitable consistent DMA mask for %s\n",
49954997
pci_name(ioc->pdev));

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