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torvaldstorvalds
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Merge tag 'drm-fixes-2025-01-11' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Regular weekly fixes, this has the usual amdgpu/xe/i915 bits. There is a bigger bunch of mediatek patches that I considered not including at this stage, but all the changes (except for one were obvious small fixes, and the rotation one is a few lines, and I suppose will help someone have their screen up the right way), I decided to include it since I expect it got slowed down by holidays etc, and it's not that mainstream a hw platform. i915: - Revert "drm/i915/hdcp: Don't enable HDCP1.4 directly from check_link" amdgpu: - Display interrupt fixes - Fix display max surface mismatches - Fix divide error in DM plane scale calcs - Display divide by 0 checks in dml helpers - SMU 13 AD/DC interrrupt handling fix - Fix locking around buddy trim handling amdkfd: - Fix page fault with shader debugger enabled - Fix eviction fence wq handling xe: - Avoid a NULL ptr deref when wedging - Fix power gate sequence on DG1 mediatek: - Revert "drm/mediatek: dsi: Correct calculation formula of PHY Timing" - Set private->all_drm_private[i]->drm to NULL if mtk_drm_bind returns err - Move mtk_crtc_finish_page_flip() to ddp_cmdq_cb() - Only touch DISP_REG_OVL_PITCH_MSB if AFBC is supported - Add support for 180-degree rotation in the display driver - Stop selecting foreign drivers - Revert "drm/mediatek: Switch to for_each_child_of_node_scoped()" - Fix YCbCr422 color format issue for DP - Fix mode valid issue for dp - dp: Reference common DAI properties - dsi: Add registers to pdata to fix MT8186/MT8188 - Remove unneeded semicolon - Add return value check when reading DPCD - Initialize pointer in mtk_drm_of_ddp_path_build_one()" * tag 'drm-fixes-2025-01-11' of https://gitlab.freedesktop.org/drm/kernel: (26 commits) drm/xe/dg1: Fix power gate sequence. drm/xe: Fix tlb invalidation when wedging Revert "drm/i915/hdcp: Don't enable HDCP1.4 directly from check_link" drm/amdgpu: Add a lock when accessing the buddy trim function drm/amd/pm: fix BUG: scheduling while atomic drm/amdkfd: wq_release signals dma_fence only when available drm/amd/display: Add check for granularity in dml ceil/floor helpers drm/amdkfd: fixed page fault when enable MES shader debugger drm/amd/display: fix divide error in DM plane scale calcs drm/amd/display: increase MAX_SURFACES to the value supported by hw drm/amd/display: fix page fault due to max surface definition mismatch drm/amd/display: Remove unnecessary amdgpu_irq_get/put drm/mediatek: Initialize pointer in mtk_drm_of_ddp_path_build_one() drm/mediatek: Add return value check when reading DPCD drm/mediatek: Remove unneeded semicolon drm/mediatek: mtk_dsi: Add registers to pdata to fix MT8186/MT8188 dt-bindings: display: mediatek: dp: Reference common DAI properties drm/mediatek: Fix mode valid issue for dp drm/mediatek: Fix YCbCr422 color format issue for DP Revert "drm/mediatek: Switch to for_each_child_of_node_scoped()" ...
2 parents f8c6263 + fddb4fd commit e0daef7

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27 files changed

+214
-149
lines changed

27 files changed

+214
-149
lines changed

‎Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml‎

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,9 @@ properties:
4242
interrupts:
4343
maxItems: 1
4444

45+
'#sound-dai-cells':
46+
const: 0
47+
4548
ports:
4649
$ref: /schemas/graph.yaml#/properties/ports
4750
properties:
@@ -85,7 +88,21 @@ required:
8588
- ports
8689
- max-linkrate-mhz
8790

88-
additionalProperties: false
91+
allOf:
92+
- $ref: /schemas/sound/dai-common.yaml#
93+
- if:
94+
not:
95+
properties:
96+
compatible:
97+
contains:
98+
enum:
99+
- mediatek,mt8188-dp-tx
100+
- mediatek,mt8195-dp-tx
101+
then:
102+
properties:
103+
'#sound-dai-cells': false
104+
105+
unevaluatedProperties: false
89106

90107
examples:
91108
- |

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -567,7 +567,6 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
567567
else
568568
remaining_size -= size;
569569
}
570-
mutex_unlock(&mgr->lock);
571570

572571
if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {
573572
struct drm_buddy_block *dcc_block;
@@ -584,6 +583,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
584583
(u64)vres->base.size,
585584
&vres->blocks);
586585
}
586+
mutex_unlock(&mgr->lock);
587587

588588
vres->base.start = 0;
589589
size = max_t(u64, amdgpu_vram_mgr_blocks_size(&vres->blocks),

‎drivers/gpu/drm/amd/amdkfd/kfd_debug.c‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -350,10 +350,27 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en)
350350
{
351351
uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;
352352
uint32_t flags = pdd->process->dbg_flags;
353+
struct amdgpu_device *adev = pdd->dev->adev;
354+
int r;
353355

354356
if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
355357
return 0;
356358

359+
if (!pdd->proc_ctx_cpu_ptr) {
360+
r = amdgpu_amdkfd_alloc_gtt_mem(adev,
361+
AMDGPU_MES_PROC_CTX_SIZE,
362+
&pdd->proc_ctx_bo,
363+
&pdd->proc_ctx_gpu_addr,
364+
&pdd->proc_ctx_cpu_ptr,
365+
false);
366+
if (r) {
367+
dev_err(adev->dev,
368+
"failed to allocate process context bo\n");
369+
return r;
370+
}
371+
memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
372+
}
373+
357374
return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
358375
pdd->watch_points, flags, sq_trap_en);
359376
}

‎drivers/gpu/drm/amd/amdkfd/kfd_process.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1160,7 +1160,8 @@ static void kfd_process_wq_release(struct work_struct *work)
11601160
*/
11611161
synchronize_rcu();
11621162
ef = rcu_access_pointer(p->ef);
1163-
dma_fence_signal(ef);
1163+
if (ef)
1164+
dma_fence_signal(ef);
11641165

11651166
kfd_process_remove_sysfs(p);
11661167

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c‎

Lines changed: 2 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -8400,16 +8400,6 @@ static void manage_dm_interrupts(struct amdgpu_device *adev,
84008400
struct amdgpu_crtc *acrtc,
84018401
struct dm_crtc_state *acrtc_state)
84028402
{
8403-
/*
8404-
* We have no guarantee that the frontend index maps to the same
8405-
* backend index - some even map to more than one.
8406-
*
8407-
* TODO: Use a different interrupt or check DC itself for the mapping.
8408-
*/
8409-
int irq_type =
8410-
amdgpu_display_crtc_idx_to_irq_type(
8411-
adev,
8412-
acrtc->crtc_id);
84138403
struct drm_vblank_crtc_config config = {0};
84148404
struct dc_crtc_timing *timing;
84158405
int offdelay;
@@ -8435,28 +8425,7 @@ static void manage_dm_interrupts(struct amdgpu_device *adev,
84358425

84368426
drm_crtc_vblank_on_config(&acrtc->base,
84378427
&config);
8438-
8439-
amdgpu_irq_get(
8440-
adev,
8441-
&adev->pageflip_irq,
8442-
irq_type);
8443-
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
8444-
amdgpu_irq_get(
8445-
adev,
8446-
&adev->vline0_irq,
8447-
irq_type);
8448-
#endif
84498428
} else {
8450-
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
8451-
amdgpu_irq_put(
8452-
adev,
8453-
&adev->vline0_irq,
8454-
irq_type);
8455-
#endif
8456-
amdgpu_irq_put(
8457-
adev,
8458-
&adev->pageflip_irq,
8459-
irq_type);
84608429
drm_crtc_vblank_off(&acrtc->base);
84618430
}
84628431
}
@@ -11155,8 +11124,8 @@ dm_get_plane_scale(struct drm_plane_state *plane_state,
1115511124
int plane_src_w, plane_src_h;
1115611125

1115711126
dm_get_oriented_plane_size(plane_state, &plane_src_w, &plane_src_h);
11158-
*out_plane_scale_w = plane_state->crtc_w * 1000 / plane_src_w;
11159-
*out_plane_scale_h = plane_state->crtc_h * 1000 / plane_src_h;
11127+
*out_plane_scale_w = plane_src_w ? plane_state->crtc_w * 1000 / plane_src_w : 0;
11128+
*out_plane_scale_h = plane_src_h ? plane_state->crtc_h * 1000 / plane_src_h : 0;
1116011129
}
1116111130

1116211131
/*

‎drivers/gpu/drm/amd/display/dc/core/dc.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4510,7 +4510,7 @@ static bool commit_minimal_transition_based_on_current_context(struct dc *dc,
45104510
struct pipe_split_policy_backup policy;
45114511
struct dc_state *intermediate_context;
45124512
struct dc_state *old_current_state = dc->current_state;
4513-
struct dc_surface_update srf_updates[MAX_SURFACE_NUM] = {0};
4513+
struct dc_surface_update srf_updates[MAX_SURFACES] = {0};
45144514
int surface_count;
45154515

45164516
/*

‎drivers/gpu/drm/amd/display/dc/core/dc_state.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -483,9 +483,9 @@ bool dc_state_add_plane(
483483
if (stream_status == NULL) {
484484
dm_error("Existing stream not found; failed to attach surface!\n");
485485
goto out;
486-
} else if (stream_status->plane_count == MAX_SURFACE_NUM) {
486+
} else if (stream_status->plane_count == MAX_SURFACES) {
487487
dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n",
488-
plane_state, MAX_SURFACE_NUM);
488+
plane_state, MAX_SURFACES);
489489
goto out;
490490
} else if (!otg_master_pipe) {
491491
goto out;
@@ -600,7 +600,7 @@ bool dc_state_rem_all_planes_for_stream(
600600
{
601601
int i, old_plane_count;
602602
struct dc_stream_status *stream_status = NULL;
603-
struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };
603+
struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };
604604

605605
for (i = 0; i < state->stream_count; i++)
606606
if (state->streams[i] == stream) {
@@ -875,7 +875,7 @@ bool dc_state_rem_all_phantom_planes_for_stream(
875875
{
876876
int i, old_plane_count;
877877
struct dc_stream_status *stream_status = NULL;
878-
struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };
878+
struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };
879879

880880
for (i = 0; i < state->stream_count; i++)
881881
if (state->streams[i] == phantom_stream) {

‎drivers/gpu/drm/amd/display/dc/dc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ struct dmub_notification;
5757

5858
#define DC_VER "3.2.310"
5959

60-
#define MAX_SURFACES 3
60+
#define MAX_SURFACES 4
6161
#define MAX_PLANES 6
6262
#define MAX_STREAMS 6
6363
#define MIN_VIEWPORT_SIZE 12
@@ -1398,7 +1398,7 @@ struct dc_scratch_space {
13981398
* store current value in plane states so we can still recover
13991399
* a valid current state during dc update.
14001400
*/
1401-
struct dc_plane_state plane_states[MAX_SURFACE_NUM];
1401+
struct dc_plane_state plane_states[MAX_SURFACES];
14021402

14031403
struct dc_stream_state stream_state;
14041404
};

‎drivers/gpu/drm/amd/display/dc/dc_stream.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ struct dc_stream_status {
5656
int plane_count;
5757
int audio_inst;
5858
struct timing_sync_info timing_sync_info;
59-
struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
59+
struct dc_plane_state *plane_states[MAX_SURFACES];
6060
bool is_abm_supported;
6161
struct mall_stream_config mall_stream_config;
6262
bool fpo_in_use;

‎drivers/gpu/drm/amd/display/dc/dc_types.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,6 @@ struct dc_perf_trace {
7676
unsigned long last_entry_write;
7777
};
7878

79-
#define MAX_SURFACE_NUM 6
8079
#define NUM_PIXEL_FORMATS 10
8180

8281
enum tiling_mode {

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