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MesihKvinodkoul
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dma-engine: sun4i: Add has_reset option to quirk
Allwinner suniv F1C100s has a reset bit for DMA in CCU. Sun4i do not has this bit but in order to support suniv we need to add it. So add support for reset bit. Signed-off-by: Mesih Kilinc <[email protected]> [ csokas.bence: Rebased and addressed comments ] Signed-off-by: Csókás Bence <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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drivers/dma/sun4i-dma.c

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@@ -15,6 +15,7 @@
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#include <linux/of_dma.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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@@ -159,6 +160,7 @@ struct sun4i_dma_config {
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u8 ddma_drq_sdram;
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u8 max_burst;
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bool has_reset;
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};
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struct sun4i_dma_pchan {
@@ -208,6 +210,7 @@ struct sun4i_dma_dev {
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int irq;
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spinlock_t lock;
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const struct sun4i_dma_config *cfg;
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struct reset_control *rst;
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};
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static struct sun4i_dma_dev *to_sun4i_dma_dev(struct dma_device *dev)
@@ -1215,6 +1218,13 @@ static int sun4i_dma_probe(struct platform_device *pdev)
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return PTR_ERR(priv->clk);
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}
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if (priv->cfg->has_reset) {
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priv->rst = devm_reset_control_get_exclusive_deasserted(&pdev->dev, NULL);
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if (IS_ERR(priv->rst))
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return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst),
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"Failed to get reset control\n");
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}
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platform_set_drvdata(pdev, priv);
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spin_lock_init(&priv->lock);
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@@ -1355,6 +1365,7 @@ static struct sun4i_dma_config sun4i_a10_dma_cfg = {
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.ddma_drq_sdram = SUN4I_DDMA_DRQ_TYPE_SDRAM,
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.max_burst = SUN4I_MAX_BURST,
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.has_reset = false,
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};
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static const struct of_device_id sun4i_dma_match[] = {

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