Skip to content

Commit e1dce56

Browse files
Gowthami Thiagarajanwilldeacon
Gowthami Thiagarajan
authored and
willdeacon
committed
perf/marvell: Marvell PEM performance monitor support
PCI Express Interface PMU includes various performance counters to monitor the data that is transmitted over the PCIe link. The counters track various inbound and outbound transactions which includes separate counters for posted/non-posted/completion TLPs. Also, inbound and outbound memory read requests along with their latencies can also be monitored. Address Translation Services(ATS)events such as ATS Translation, ATS Page Request, ATS Invalidation along with their corresponding latencies are also supported. The performance counters are 64 bits wide. For instance, perf stat -e ib_tlp_pr <workload> tracks the inbound posted TLPs for the workload. Co-developed-by: Linu Cherian <[email protected]> Signed-off-by: Linu Cherian <[email protected]> Signed-off-by: Gowthami Thiagarajan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
1 parent 0bbff9e commit e1dce56

File tree

7 files changed

+497
-0
lines changed

7 files changed

+497
-0
lines changed

‎Documentation/admin-guide/perf/index.rst

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,3 +26,4 @@ Performance monitor support
2626
meson-ddr-pmu
2727
cxl
2828
ampere_cspmu
29+
mrvl-pem-pmu

‎Documentation/admin-guide/perf/mrvl-pem-pmu.rst

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
=================================================================
2+
Marvell Odyssey PEM Performance Monitoring Unit (PMU UNCORE)
3+
=================================================================
4+
5+
The PCI Express Interface Units(PEM) are associated with a corresponding
6+
monitoring unit. This includes performance counters to track various
7+
characteristics of the data that is transmitted over the PCIe link.
8+
9+
The counters track inbound and outbound transactions which
10+
includes separate counters for posted/non-posted/completion TLPs.
11+
Also, inbound and outbound memory read requests along with their
12+
latencies can also be monitored. Address Translation Services(ATS)events
13+
such as ATS Translation, ATS Page Request, ATS Invalidation along with
14+
their corresponding latencies are also tracked.
15+
16+
There are separate 64 bit counters to measure posted/non-posted/completion
17+
tlps in inbound and outbound transactions. ATS events are measured by
18+
different counters.
19+
20+
The PMU driver exposes the available events and format options under sysfs,
21+
/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/events/
22+
/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/format/
23+
24+
Examples::
25+
26+
# perf list | grep mrvl_pcie_rc_pmu
27+
mrvl_pcie_rc_pmu_<>/ats_inv/ [Kernel PMU event]
28+
mrvl_pcie_rc_pmu_<>/ats_inv_latency/ [Kernel PMU event]
29+
mrvl_pcie_rc_pmu_<>/ats_pri/ [Kernel PMU event]
30+
mrvl_pcie_rc_pmu_<>/ats_pri_latency/ [Kernel PMU event]
31+
mrvl_pcie_rc_pmu_<>/ats_trans/ [Kernel PMU event]
32+
mrvl_pcie_rc_pmu_<>/ats_trans_latency/ [Kernel PMU event]
33+
mrvl_pcie_rc_pmu_<>/ib_inflight/ [Kernel PMU event]
34+
mrvl_pcie_rc_pmu_<>/ib_reads/ [Kernel PMU event]
35+
mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ebus/ [Kernel PMU event]
36+
mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ncb/ [Kernel PMU event]
37+
mrvl_pcie_rc_pmu_<>/ib_tlp_cpl_partid/ [Kernel PMU event]
38+
mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_cpl_partid/ [Kernel PMU event]
39+
mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_npr/ [Kernel PMU event]
40+
mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_pr/ [Kernel PMU event]
41+
mrvl_pcie_rc_pmu_<>/ib_tlp_npr/ [Kernel PMU event]
42+
mrvl_pcie_rc_pmu_<>/ib_tlp_pr/ [Kernel PMU event]
43+
mrvl_pcie_rc_pmu_<>/ob_inflight_partid/ [Kernel PMU event]
44+
mrvl_pcie_rc_pmu_<>/ob_merges_cpl_partid/ [Kernel PMU event]
45+
mrvl_pcie_rc_pmu_<>/ob_merges_npr_partid/ [Kernel PMU event]
46+
mrvl_pcie_rc_pmu_<>/ob_merges_pr_partid/ [Kernel PMU event]
47+
mrvl_pcie_rc_pmu_<>/ob_reads_partid/ [Kernel PMU event]
48+
mrvl_pcie_rc_pmu_<>/ob_tlp_cpl_partid/ [Kernel PMU event]
49+
mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_cpl_partid/ [Kernel PMU event]
50+
mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_npr_partid/ [Kernel PMU event]
51+
mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_pr_partid/ [Kernel PMU event]
52+
mrvl_pcie_rc_pmu_<>/ob_tlp_npr_partid/ [Kernel PMU event]
53+
mrvl_pcie_rc_pmu_<>/ob_tlp_pr_partid/ [Kernel PMU event]
54+
55+
56+
# perf stat -e ib_inflight,ib_reads,ib_req_no_ro_ebus,ib_req_no_ro_ncb <workload>

‎MAINTAINERS

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13845,6 +13845,12 @@ S: Supported
1384513845
F: Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
1384613846
F: drivers/net/ethernet/marvell/octeontx2/af/
1384713847

13848+
MARVELL PEM PMU DRIVER
13849+
M: Linu Cherian <[email protected]>
13850+
M: Gowthami Thiagarajan <[email protected]>
13851+
S: Supported
13852+
F: drivers/perf/marvell_pem_pmu.c
13853+
1384813854
MARVELL PRESTERA ETHERNET SWITCH DRIVER
1384913855
M: Taras Chornyi <[email protected]>
1385013856
S: Supported

‎drivers/perf/Kconfig

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -284,4 +284,11 @@ config CXL_PMU
284284

285285
If unsure say 'm'.
286286

287+
config MARVELL_PEM_PMU
288+
tristate "MARVELL PEM PMU Support"
289+
depends on ARCH_THUNDER || (COMPILE_TEST && 64BIT)
290+
help
291+
Enable support for PCIe Interface performance monitoring
292+
on Marvell platform.
293+
287294
endmenu

‎drivers/perf/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
2626
obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o
2727
obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o
2828
obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o
29+
obj-$(CONFIG_MARVELL_PEM_PMU) += marvell_pem_pmu.o
2930
obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o
3031
obj-$(CONFIG_ALIBABA_UNCORE_DRW_PMU) += alibaba_uncore_drw_pmu.o
3132
obj-$(CONFIG_DWC_PCIE_PMU) += dwc_pcie_pmu.o

0 commit comments

Comments
 (0)