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84 | 84 | #define NVSW_SN2201_MAIN_MUX_CH5_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 5)
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85 | 85 | #define NVSW_SN2201_MAIN_MUX_CH6_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 6)
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86 | 86 | #define NVSW_SN2201_MAIN_MUX_CH7_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 7)
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| 87 | +#define NVSW_SN2201_2ND_MUX_CH0_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 1) |
| 88 | +#define NVSW_SN2201_2ND_MUX_CH1_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 2) |
| 89 | +#define NVSW_SN2201_2ND_MUX_CH2_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 3) |
| 90 | +#define NVSW_SN2201_2ND_MUX_CH3_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 4) |
87 | 91 |
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88 | 92 | #define NVSW_SN2201_CPLD_NR NVSW_SN2201_MAIN_MUX_CH0_NR
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89 | 93 | #define NVSW_SN2201_NR_NONE -1
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@@ -425,28 +429,28 @@ static struct mlxreg_core_data nvsw_sn2201_fan_items_data[] = {
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425 | 429 | .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET,
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426 | 430 | .mask = BIT(0),
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427 | 431 | .hpdev.brdinfo = &nvsw_sn2201_fan_devices[0],
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428 |
| - .hpdev.nr = NVSW_SN2201_NR_NONE, |
| 432 | + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH0_NR, |
429 | 433 | },
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430 | 434 | {
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431 | 435 | .label = "fan2",
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432 | 436 | .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET,
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433 | 437 | .mask = BIT(1),
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434 | 438 | .hpdev.brdinfo = &nvsw_sn2201_fan_devices[1],
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435 |
| - .hpdev.nr = NVSW_SN2201_NR_NONE, |
| 439 | + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH1_NR, |
436 | 440 | },
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437 | 441 | {
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438 | 442 | .label = "fan3",
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439 | 443 | .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET,
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440 | 444 | .mask = BIT(2),
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441 | 445 | .hpdev.brdinfo = &nvsw_sn2201_fan_devices[2],
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442 |
| - .hpdev.nr = NVSW_SN2201_NR_NONE, |
| 446 | + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH2_NR, |
443 | 447 | },
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444 | 448 | {
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445 | 449 | .label = "fan4",
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446 | 450 | .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET,
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447 | 451 | .mask = BIT(3),
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448 | 452 | .hpdev.brdinfo = &nvsw_sn2201_fan_devices[3],
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449 |
| - .hpdev.nr = NVSW_SN2201_NR_NONE, |
| 453 | + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH3_NR, |
450 | 454 | },
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451 | 455 | };
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452 | 456 |
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