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jbrun3tbroonie
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ASoC: meson: axg-tdm-interface: fix mclk setup without mclk-fs
By default, when mclk-fs is not provided, the tdm-interface driver requests an MCLK that is 4x the bit clock, SCLK. However there is no justification for this: * If the codec needs MCLK for its operation, mclk-fs is expected to be set according to the codec requirements. * If the codec does not need MCLK the minimum is 2 * SCLK, because this is minimum the divider between SCLK and MCLK can do. Multiplying by 4 may cause problems because the PLL limit may be reached sooner than it should, so use 2x instead. Fixes: d60e4f1 ("ASoC: meson: add tdm interface driver") Signed-off-by: Jerome Brunet <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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sound/soc/meson/axg-tdm-interface.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -264,8 +264,8 @@ static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai,
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srate = iface->slots * iface->slot_width * params_rate(params);
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if (!iface->mclk_rate) {
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/* If no specific mclk is requested, default to bit clock * 4 */
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clk_set_rate(iface->mclk, 4 * srate);
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/* If no specific mclk is requested, default to bit clock * 2 */
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clk_set_rate(iface->mclk, 2 * srate);
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} else {
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/* Check if we can actually get the bit clock from mclk */
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if (iface->mclk_rate % srate) {

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