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Venkata-Prasad-Potturubroonie
Venkata-Prasad-Potturu
authored and
broonie
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ASoC: amd: acp: Remove redundant acp_dev_data structure
Move acp_dev_data structure members to acp_chip_info structure to avoid using common members in each structure and remove redundant acp_dev_data structure. Signed-off-by: Venkata Prasad Potturu <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
1 parent aaf7a66 commit e393368

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9 files changed

+276
-420
lines changed

9 files changed

+276
-420
lines changed

‎sound/soc/amd/acp/acp-i2s.c

Lines changed: 88 additions & 93 deletions
Large diffs are not rendered by default.

‎sound/soc/amd/acp/acp-legacy-common.c

Lines changed: 51 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -38,26 +38,25 @@ EXPORT_SYMBOL_NS_GPL(acp_common_hw_ops, "SND_SOC_ACP_COMMON");
3838
irqreturn_t acp_irq_handler(int irq, void *data)
3939
{
4040
struct acp_chip_info *chip = data;
41-
struct acp_dev_data *adata = chip->adata;
42-
struct acp_resource *rsrc = adata->rsrc;
41+
struct acp_resource *rsrc = chip->rsrc;
4342
struct acp_stream *stream;
4443
u16 i2s_flag = 0;
4544
u32 ext_intr_stat, ext_intr_stat1;
4645

47-
if (adata->rsrc->no_of_ctrls == 2)
46+
if (rsrc->no_of_ctrls == 2)
4847
ext_intr_stat1 = readl(ACP_EXTERNAL_INTR_STAT(chip, (rsrc->irqp_used - 1)));
4948

5049
ext_intr_stat = readl(ACP_EXTERNAL_INTR_STAT(chip, rsrc->irqp_used));
5150

52-
spin_lock(&adata->acp_lock);
53-
list_for_each_entry(stream, &adata->stream_list, list) {
51+
spin_lock(&chip->acp_lock);
52+
list_for_each_entry(stream, &chip->stream_list, list) {
5453
if (ext_intr_stat & stream->irq_bit) {
5554
writel(stream->irq_bit,
5655
ACP_EXTERNAL_INTR_STAT(chip, rsrc->irqp_used));
5756
snd_pcm_period_elapsed(stream->substream);
5857
i2s_flag = 1;
5958
}
60-
if (adata->rsrc->no_of_ctrls == 2) {
59+
if (chip->rsrc->no_of_ctrls == 2) {
6160
if (ext_intr_stat1 & stream->irq_bit) {
6261
writel(stream->irq_bit, ACP_EXTERNAL_INTR_STAT(chip,
6362
(rsrc->irqp_used - 1)));
@@ -66,7 +65,7 @@ irqreturn_t acp_irq_handler(int irq, void *data)
6665
}
6766
}
6867
}
69-
spin_unlock(&adata->acp_lock);
68+
spin_unlock(&chip->acp_lock);
7069
if (i2s_flag)
7170
return IRQ_HANDLED;
7271

@@ -106,7 +105,7 @@ static void set_acp_pdm_ring_buffer(struct snd_pcm_substream *substream,
106105
struct snd_pcm_runtime *runtime = substream->runtime;
107106
struct acp_stream *stream = runtime->private_data;
108107
struct device *dev = dai->component->dev;
109-
struct acp_dev_data *adata = dev_get_drvdata(dev);
108+
struct acp_chip_info *chip = dev_get_platdata(dev);
110109

111110
u32 physical_addr, pdm_size, period_bytes;
112111

@@ -115,43 +114,40 @@ static void set_acp_pdm_ring_buffer(struct snd_pcm_substream *substream,
115114
physical_addr = stream->reg_offset + MEM_WINDOW_START;
116115

117116
/* Init ACP PDM Ring buffer */
118-
writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
119-
writel(pdm_size, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
120-
writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
121-
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
117+
writel(physical_addr, chip->base + ACP_WOV_RX_RINGBUFADDR);
118+
writel(pdm_size, chip->base + ACP_WOV_RX_RINGBUFSIZE);
119+
writel(period_bytes, chip->base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
120+
writel(0x01, chip->base + ACPAXI2AXI_ATU_CTRL);
122121
}
123122

124123
static void set_acp_pdm_clk(struct snd_pcm_substream *substream,
125124
struct snd_soc_dai *dai)
126125
{
127126
struct device *dev = dai->component->dev;
128-
struct acp_dev_data *adata = dev_get_drvdata(dev);
127+
struct acp_chip_info *chip = dev_get_platdata(dev);
129128
unsigned int pdm_ctrl;
130129

131130
/* Enable default ACP PDM clk */
132-
writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
133-
pdm_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
131+
writel(PDM_CLK_FREQ_MASK, chip->base + ACP_WOV_CLK_CTRL);
132+
pdm_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
134133
pdm_ctrl |= PDM_MISC_CTRL_MASK;
135-
writel(pdm_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
134+
writel(pdm_ctrl, chip->base + ACP_WOV_MISC_CTRL);
136135
set_acp_pdm_ring_buffer(substream, dai);
137136
}
138137

139138
void restore_acp_pdm_params(struct snd_pcm_substream *substream,
140-
struct acp_dev_data *adata)
139+
struct acp_chip_info *chip)
141140
{
142141
struct snd_soc_dai *dai;
143-
struct device *dev;
144-
struct acp_chip_info *chip;
145142
struct snd_soc_pcm_runtime *soc_runtime;
146143
u32 ext_int_ctrl;
147144

148145
soc_runtime = snd_soc_substream_to_rtd(substream);
149146
dai = snd_soc_rtd_to_cpu(soc_runtime, 0);
150-
dev = dai->component->dev;
151-
chip = dev_get_platdata(dev);
147+
152148
/* Programming channel mask and sampling rate */
153-
writel(adata->ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
154-
writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
149+
writel(chip->ch_mask, chip->base + ACP_WOV_PDM_NO_OF_CHANNELS);
150+
writel(PDM_DEC_64, chip->base + ACP_WOV_PDM_DECIMATION_FACTOR);
155151

156152
/* Enabling ACP Pdm interuppts */
157153
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, 0));
@@ -165,9 +161,8 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
165161
struct snd_soc_dai *dai)
166162
{
167163
struct device *dev = dai->component->dev;
168-
struct acp_dev_data *adata = dev_get_drvdata(dev);
169-
struct acp_resource *rsrc = adata->rsrc;
170164
struct acp_chip_info *chip = dev_get_platdata(dev);
165+
struct acp_resource *rsrc = chip->rsrc;
171166
struct acp_stream *stream = substream->runtime->private_data;
172167
u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
173168
u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
@@ -176,40 +171,40 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
176171
switch (dai->driver->id) {
177172
case I2S_SP_INSTANCE:
178173
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
179-
reg_dma_size = ACP_I2S_TX_DMA_SIZE(adata);
174+
reg_dma_size = ACP_I2S_TX_DMA_SIZE(chip);
180175
acp_fifo_addr = rsrc->sram_pte_offset +
181176
SP_PB_FIFO_ADDR_OFFSET;
182-
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(adata);
183-
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(adata);
177+
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
178+
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
184179
phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
185-
writel(phy_addr, adata->acp_base + ACP_I2S_TX_RINGBUFADDR(adata));
180+
writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
186181
} else {
187-
reg_dma_size = ACP_I2S_RX_DMA_SIZE(adata);
182+
reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
188183
acp_fifo_addr = rsrc->sram_pte_offset +
189184
SP_CAPT_FIFO_ADDR_OFFSET;
190-
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(adata);
191-
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(adata);
185+
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
186+
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
192187
phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
193-
writel(phy_addr, adata->acp_base + ACP_I2S_RX_RINGBUFADDR(adata));
188+
writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
194189
}
195190
break;
196191
case I2S_BT_INSTANCE:
197192
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
198-
reg_dma_size = ACP_BT_TX_DMA_SIZE(adata);
193+
reg_dma_size = ACP_BT_TX_DMA_SIZE(chip);
199194
acp_fifo_addr = rsrc->sram_pte_offset +
200195
BT_PB_FIFO_ADDR_OFFSET;
201-
reg_fifo_addr = ACP_BT_TX_FIFOADDR(adata);
202-
reg_fifo_size = ACP_BT_TX_FIFOSIZE(adata);
196+
reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
197+
reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
203198
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
204-
writel(phy_addr, adata->acp_base + ACP_BT_TX_RINGBUFADDR(adata));
199+
writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
205200
} else {
206-
reg_dma_size = ACP_BT_RX_DMA_SIZE(adata);
201+
reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
207202
acp_fifo_addr = rsrc->sram_pte_offset +
208203
BT_CAPT_FIFO_ADDR_OFFSET;
209-
reg_fifo_addr = ACP_BT_RX_FIFOADDR(adata);
210-
reg_fifo_size = ACP_BT_RX_FIFOSIZE(adata);
204+
reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
205+
reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
211206
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
212-
writel(phy_addr, adata->acp_base + ACP_BT_RX_RINGBUFADDR(adata));
207+
writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
213208
}
214209
break;
215210
case I2S_HS_INSTANCE:
@@ -220,25 +215,25 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
220215
reg_fifo_addr = ACP_HS_TX_FIFOADDR;
221216
reg_fifo_size = ACP_HS_TX_FIFOSIZE;
222217
phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
223-
writel(phy_addr, adata->acp_base + ACP_HS_TX_RINGBUFADDR);
218+
writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
224219
} else {
225220
reg_dma_size = ACP_HS_RX_DMA_SIZE;
226221
acp_fifo_addr = rsrc->sram_pte_offset +
227222
HS_CAPT_FIFO_ADDR_OFFSET;
228223
reg_fifo_addr = ACP_HS_RX_FIFOADDR;
229224
reg_fifo_size = ACP_HS_RX_FIFOSIZE;
230225
phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
231-
writel(phy_addr, adata->acp_base + ACP_HS_RX_RINGBUFADDR);
226+
writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
232227
}
233228
break;
234229
default:
235230
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
236231
return -EINVAL;
237232
}
238233

239-
writel(DMA_SIZE, adata->acp_base + reg_dma_size);
240-
writel(acp_fifo_addr, adata->acp_base + reg_fifo_addr);
241-
writel(FIFO_SIZE, adata->acp_base + reg_fifo_size);
234+
writel(DMA_SIZE, chip->base + reg_dma_size);
235+
writel(acp_fifo_addr, chip->base + reg_fifo_addr);
236+
writel(FIFO_SIZE, chip->base + reg_fifo_size);
242237

243238
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
244239
ext_int_ctrl |= BIT(I2S_RX_THRESHOLD(rsrc->offset)) |
@@ -253,7 +248,7 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
253248
}
254249

255250
int restore_acp_i2s_params(struct snd_pcm_substream *substream,
256-
struct acp_dev_data *adata,
251+
struct acp_chip_info *chip,
257252
struct acp_stream *stream)
258253
{
259254
struct snd_soc_dai *dai;
@@ -263,7 +258,7 @@ int restore_acp_i2s_params(struct snd_pcm_substream *substream,
263258
soc_runtime = snd_soc_substream_to_rtd(substream);
264259
dai = snd_soc_rtd_to_cpu(soc_runtime, 0);
265260
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
266-
tdm_fmt = adata->tdm_tx_fmt[stream->dai_id - 1];
261+
tdm_fmt = chip->tdm_tx_fmt[stream->dai_id - 1];
267262
switch (stream->dai_id) {
268263
case I2S_BT_INSTANCE:
269264
reg_val = ACP_BTTDM_ITER;
@@ -281,9 +276,9 @@ int restore_acp_i2s_params(struct snd_pcm_substream *substream,
281276
pr_err("Invalid dai id %x\n", stream->dai_id);
282277
return -EINVAL;
283278
}
284-
val = adata->xfer_tx_resolution[stream->dai_id - 1] << 3;
279+
val = chip->xfer_tx_resolution[stream->dai_id - 1] << 3;
285280
} else {
286-
tdm_fmt = adata->tdm_rx_fmt[stream->dai_id - 1];
281+
tdm_fmt = chip->tdm_rx_fmt[stream->dai_id - 1];
287282
switch (stream->dai_id) {
288283
case I2S_BT_INSTANCE:
289284
reg_val = ACP_BTTDM_IRER;
@@ -301,13 +296,13 @@ int restore_acp_i2s_params(struct snd_pcm_substream *substream,
301296
pr_err("Invalid dai id %x\n", stream->dai_id);
302297
return -EINVAL;
303298
}
304-
val = adata->xfer_rx_resolution[stream->dai_id - 1] << 3;
299+
val = chip->xfer_rx_resolution[stream->dai_id - 1] << 3;
305300
}
306-
writel(val, adata->acp_base + reg_val);
307-
if (adata->tdm_mode == TDM_ENABLE) {
308-
writel(tdm_fmt, adata->acp_base + fmt_reg);
309-
val = readl(adata->acp_base + reg_val);
310-
writel(val | 0x2, adata->acp_base + reg_val);
301+
writel(val, chip->base + reg_val);
302+
if (chip->tdm_mode == TDM_ENABLE) {
303+
writel(tdm_fmt, chip->base + fmt_reg);
304+
val = readl(chip->base + reg_val);
305+
writel(val | 0x2, chip->base + reg_val);
311306
}
312307
return set_acp_i2s_dma_fifo(substream, dai);
313308
}

‎sound/soc/amd/acp/acp-pdm.c

Lines changed: 20 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -30,17 +30,16 @@ static int acp_dmic_prepare(struct snd_pcm_substream *substream,
3030
{
3131
struct acp_stream *stream = substream->runtime->private_data;
3232
struct device *dev = dai->component->dev;
33-
struct acp_dev_data *adata = dev_get_drvdata(dev);
3433
struct acp_chip_info *chip;
3534
u32 physical_addr, size_dmic, period_bytes;
3635
unsigned int dmic_ctrl;
3736

3837
chip = dev_get_platdata(dev);
3938
/* Enable default DMIC clk */
40-
writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
41-
dmic_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
39+
writel(PDM_CLK_FREQ_MASK, chip->base + ACP_WOV_CLK_CTRL);
40+
dmic_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
4241
dmic_ctrl |= PDM_MISC_CTRL_MASK;
43-
writel(dmic_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
42+
writel(dmic_ctrl, chip->base + ACP_WOV_MISC_CTRL);
4443

4544
period_bytes = frames_to_bytes(substream->runtime,
4645
substream->runtime->period_size);
@@ -53,10 +52,10 @@ static int acp_dmic_prepare(struct snd_pcm_substream *substream,
5352
physical_addr = stream->reg_offset + MEM_WINDOW_START;
5453

5554
/* Init DMIC Ring buffer */
56-
writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
57-
writel(size_dmic, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
58-
writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
59-
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
55+
writel(physical_addr, chip->base + ACP_WOV_RX_RINGBUFADDR);
56+
writel(size_dmic, chip->base + ACP_WOV_RX_RINGBUFSIZE);
57+
writel(period_bytes, chip->base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
58+
writel(0x01, chip->base + ACPAXI2AXI_ATU_CTRL);
6059

6160
return 0;
6261
}
@@ -65,35 +64,35 @@ static int acp_dmic_dai_trigger(struct snd_pcm_substream *substream,
6564
int cmd, struct snd_soc_dai *dai)
6665
{
6766
struct device *dev = dai->component->dev;
68-
struct acp_dev_data *adata = dev_get_drvdata(dev);
67+
struct acp_chip_info *chip = dev_get_platdata(dev);
6968
unsigned int dma_enable;
7069
int ret = 0;
7170

7271
switch (cmd) {
7372
case SNDRV_PCM_TRIGGER_START:
7473
case SNDRV_PCM_TRIGGER_RESUME:
7574
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
76-
dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
75+
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
7776
if (!(dma_enable & DMA_EN_MASK)) {
78-
writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
79-
writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
77+
writel(PDM_ENABLE, chip->base + ACP_WOV_PDM_ENABLE);
78+
writel(PDM_ENABLE, chip->base + ACP_WOV_PDM_DMA_ENABLE);
8079
}
8180

82-
ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
81+
ret = readl_poll_timeout_atomic(chip->base + ACP_WOV_PDM_DMA_ENABLE,
8382
dma_enable, (dma_enable & DMA_EN_MASK),
8483
DELAY_US, PDM_TIMEOUT);
8584
break;
8685
case SNDRV_PCM_TRIGGER_STOP:
8786
case SNDRV_PCM_TRIGGER_SUSPEND:
8887
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
89-
dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
88+
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
9089
if ((dma_enable & DMA_EN_MASK)) {
91-
writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
92-
writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
90+
writel(PDM_DISABLE, chip->base + ACP_WOV_PDM_ENABLE);
91+
writel(PDM_DISABLE, chip->base + ACP_WOV_PDM_DMA_ENABLE);
9392

9493
}
9594

96-
ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
95+
ret = readl_poll_timeout_atomic(chip->base + ACP_WOV_PDM_DMA_ENABLE,
9796
dma_enable, !(dma_enable & DMA_EN_MASK),
9897
DELAY_US, PDM_TIMEOUT);
9998
break;
@@ -109,7 +108,7 @@ static int acp_dmic_hwparams(struct snd_pcm_substream *substream,
109108
struct snd_pcm_hw_params *hwparams, struct snd_soc_dai *dai)
110109
{
111110
struct device *dev = dai->component->dev;
112-
struct acp_dev_data *adata = dev_get_drvdata(dev);
111+
struct acp_chip_info *chip = dev_get_platdata(dev);
113112
unsigned int channels, ch_mask;
114113

115114
channels = params_channels(hwparams);
@@ -128,14 +127,14 @@ static int acp_dmic_hwparams(struct snd_pcm_substream *substream,
128127
return -EINVAL;
129128
}
130129

131-
adata->ch_mask = ch_mask;
130+
chip->ch_mask = ch_mask;
132131
if (params_format(hwparams) != SNDRV_PCM_FORMAT_S32_LE) {
133132
dev_err(dai->dev, "Invalid format:%d\n", params_format(hwparams));
134133
return -EINVAL;
135134
}
136135

137-
writel(ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
138-
writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
136+
writel(ch_mask, chip->base + ACP_WOV_PDM_NO_OF_CHANNELS);
137+
writel(PDM_DEC_64, chip->base + ACP_WOV_PDM_DECIMATION_FACTOR);
139138

140139
return 0;
141140
}

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