We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent b9ebd16 commit e4950b0Copy full SHA for e4950b0
arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -663,6 +663,22 @@
663
lvts_calibration: calib@918 {
664
reg = <0x918 0x28>;
665
};
666
+
667
+ phy_calibration_p0: calib@940 {
668
+ reg = <0x940 0x10>;
669
+ };
670
671
+ phy_calibration_p1: calib@954 {
672
+ reg = <0x954 0x10>;
673
674
675
+ phy_calibration_p2: calib@968 {
676
+ reg = <0x968 0x10>;
677
678
679
+ phy_calibration_p3: calib@97c {
680
+ reg = <0x97c 0x10>;
681
682
683
684
clock-controller@15000000 {
0 commit comments