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drm/msm/dpu: fix DSC 1.2 block lengths
All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. This includes the common block itself, enc subblocks and some empty space around. Change that to pass 0x4 instead, the length of common register block itself. Fixes: 0d1b10c ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") Reported-by: Ryan McCann <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/550998/ Link: https://lore.kernel.org/r/[email protected]
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5 files changed

+19
-19
lines changed

5 files changed

+19
-19
lines changed

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -283,22 +283,22 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = {
283283
static const struct dpu_dsc_cfg sm8350_dsc[] = {
284284
{
285285
.name = "dce_0_0", .id = DSC_0,
286-
.base = 0x80000, .len = 0x29c,
286+
.base = 0x80000, .len = 0x4,
287287
.features = BIT(DPU_DSC_HW_REV_1_2),
288288
.sblk = &dsc_sblk_0,
289289
}, {
290290
.name = "dce_0_1", .id = DSC_1,
291-
.base = 0x80000, .len = 0x29c,
291+
.base = 0x80000, .len = 0x4,
292292
.features = BIT(DPU_DSC_HW_REV_1_2),
293293
.sblk = &dsc_sblk_1,
294294
}, {
295295
.name = "dce_1_0", .id = DSC_2,
296-
.base = 0x81000, .len = 0x29c,
296+
.base = 0x81000, .len = 0x4,
297297
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
298298
.sblk = &dsc_sblk_0,
299299
}, {
300300
.name = "dce_1_1", .id = DSC_3,
301-
.base = 0x81000, .len = 0x29c,
301+
.base = 0x81000, .len = 0x4,
302302
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
303303
.sblk = &dsc_sblk_1,
304304
},

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = {
163163
static const struct dpu_dsc_cfg sc7280_dsc[] = {
164164
{
165165
.name = "dce_0_0", .id = DSC_0,
166-
.base = 0x80000, .len = 0x29c,
166+
.base = 0x80000, .len = 0x4,
167167
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
168168
.sblk = &dsc_sblk_0,
169169
},

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -286,32 +286,32 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = {
286286
static const struct dpu_dsc_cfg sc8280xp_dsc[] = {
287287
{
288288
.name = "dce_0_0", .id = DSC_0,
289-
.base = 0x80000, .len = 0x29c,
289+
.base = 0x80000, .len = 0x4,
290290
.features = BIT(DPU_DSC_HW_REV_1_2),
291291
.sblk = &dsc_sblk_0,
292292
}, {
293293
.name = "dce_0_1", .id = DSC_1,
294-
.base = 0x80000, .len = 0x29c,
294+
.base = 0x80000, .len = 0x4,
295295
.features = BIT(DPU_DSC_HW_REV_1_2),
296296
.sblk = &dsc_sblk_1,
297297
}, {
298298
.name = "dce_1_0", .id = DSC_2,
299-
.base = 0x81000, .len = 0x29c,
299+
.base = 0x81000, .len = 0x4,
300300
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
301301
.sblk = &dsc_sblk_0,
302302
}, {
303303
.name = "dce_1_1", .id = DSC_3,
304-
.base = 0x81000, .len = 0x29c,
304+
.base = 0x81000, .len = 0x4,
305305
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
306306
.sblk = &dsc_sblk_1,
307307
}, {
308308
.name = "dce_2_0", .id = DSC_4,
309-
.base = 0x82000, .len = 0x29c,
309+
.base = 0x82000, .len = 0x4,
310310
.features = BIT(DPU_DSC_HW_REV_1_2),
311311
.sblk = &dsc_sblk_0,
312312
}, {
313313
.name = "dce_2_1", .id = DSC_5,
314-
.base = 0x82000, .len = 0x29c,
314+
.base = 0x82000, .len = 0x4,
315315
.features = BIT(DPU_DSC_HW_REV_1_2),
316316
.sblk = &dsc_sblk_1,
317317
},

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -305,22 +305,22 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = {
305305
static const struct dpu_dsc_cfg sm8450_dsc[] = {
306306
{
307307
.name = "dce_0_0", .id = DSC_0,
308-
.base = 0x80000, .len = 0x29c,
308+
.base = 0x80000, .len = 0x4,
309309
.features = BIT(DPU_DSC_HW_REV_1_2),
310310
.sblk = &dsc_sblk_0,
311311
}, {
312312
.name = "dce_0_1", .id = DSC_1,
313-
.base = 0x80000, .len = 0x29c,
313+
.base = 0x80000, .len = 0x4,
314314
.features = BIT(DPU_DSC_HW_REV_1_2),
315315
.sblk = &dsc_sblk_1,
316316
}, {
317317
.name = "dce_1_0", .id = DSC_2,
318-
.base = 0x81000, .len = 0x29c,
318+
.base = 0x81000, .len = 0x4,
319319
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
320320
.sblk = &dsc_sblk_0,
321321
}, {
322322
.name = "dce_1_1", .id = DSC_3,
323-
.base = 0x81000, .len = 0x29c,
323+
.base = 0x81000, .len = 0x4,
324324
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
325325
.sblk = &dsc_sblk_1,
326326
},

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -320,22 +320,22 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = {
320320
static const struct dpu_dsc_cfg sm8550_dsc[] = {
321321
{
322322
.name = "dce_0_0", .id = DSC_0,
323-
.base = 0x80000, .len = 0x29c,
323+
.base = 0x80000, .len = 0x4,
324324
.features = BIT(DPU_DSC_HW_REV_1_2),
325325
.sblk = &dsc_sblk_0,
326326
}, {
327327
.name = "dce_0_1", .id = DSC_1,
328-
.base = 0x80000, .len = 0x29c,
328+
.base = 0x80000, .len = 0x4,
329329
.features = BIT(DPU_DSC_HW_REV_1_2),
330330
.sblk = &dsc_sblk_1,
331331
}, {
332332
.name = "dce_1_0", .id = DSC_2,
333-
.base = 0x81000, .len = 0x29c,
333+
.base = 0x81000, .len = 0x4,
334334
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
335335
.sblk = &dsc_sblk_0,
336336
}, {
337337
.name = "dce_1_1", .id = DSC_3,
338-
.base = 0x81000, .len = 0x29c,
338+
.base = 0x81000, .len = 0x4,
339339
.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
340340
.sblk = &dsc_sblk_1,
341341
},

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