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x86: update AS_* macros to binutils >=2.23, supporting ADX and AVX2
Now that the kernel specifies binutils 2.23 as the minimum version, we can remove ifdefs for AVX2 and ADX throughout. Signed-off-by: Jason A. Donenfeld <[email protected]> Acked-by: Ingo Molnar <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Masahiro Yamada <[email protected]>
1 parent d7e40ea commit e6abef6

21 files changed

+15
-90
lines changed

‎arch/x86/Kconfig.assembler

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,6 @@
11
# SPDX-License-Identifier: GPL-2.0
22
# Copyright (C) 2020 Jason A. Donenfeld <[email protected]>. All Rights Reserved.
33

4-
config AS_AVX2
5-
def_bool $(as-instr,vpbroadcastb %xmm0$(comma)%ymm1)
6-
help
7-
Supported by binutils >= 2.22 and LLVM integrated assembler
8-
94
config AS_AVX512
105
def_bool $(as-instr,vpmovm2b %k1$(comma)%zmm5)
116
help
@@ -20,8 +15,3 @@ config AS_SHA256_NI
2015
def_bool $(as-instr,sha256msg1 %xmm0$(comma)%xmm1)
2116
help
2217
Supported by binutils >= 2.24 and LLVM integrated assembler
23-
24-
config AS_ADX
25-
def_bool $(as-instr,adox %eax$(comma)%eax)
26-
help
27-
Supported by binutils >= 2.23 and LLVM integrated assembler

‎arch/x86/crypto/Makefile

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -47,17 +47,15 @@ obj-$(CONFIG_CRYPTO_AEGIS128_AESNI_SSE2) += aegis128-aesni.o
4747
aegis128-aesni-y := aegis128-aesni-asm.o aegis128-aesni-glue.o
4848

4949
obj-$(CONFIG_CRYPTO_CHACHA20_X86_64) += chacha-x86_64.o
50-
chacha-x86_64-y := chacha-ssse3-x86_64.o chacha_glue.o
51-
chacha-x86_64-$(CONFIG_AS_AVX2) += chacha-avx2-x86_64.o
50+
chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha_glue.o
5251
chacha-x86_64-$(CONFIG_AS_AVX512) += chacha-avx512vl-x86_64.o
5352

5453
obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
5554
aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
5655
aesni-intel-$(CONFIG_64BIT) += aesni-intel_avx-x86_64.o aes_ctrby8_avx-x86_64.o
5756

5857
obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
59-
sha1-ssse3-y := sha1_ssse3_asm.o sha1_ssse3_glue.o
60-
sha1-ssse3-$(CONFIG_AS_AVX2) += sha1_avx2_x86_64_asm.o
58+
sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o
6159
sha1-ssse3-$(CONFIG_AS_SHA1_NI) += sha1_ni_asm.o
6260

6361
obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o

‎arch/x86/crypto/aesni-intel_avx-x86_64.S

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1868,7 +1868,6 @@ key_256_finalize:
18681868
ret
18691869
SYM_FUNC_END(aesni_gcm_finalize_avx_gen2)
18701870

1871-
#ifdef CONFIG_AS_AVX2
18721871
###############################################################################
18731872
# GHASH_MUL MACRO to implement: Data*HashKey mod (128,127,126,121,0)
18741873
# Input: A and B (128-bits each, bit-reflected)
@@ -2836,5 +2835,3 @@ key_256_finalize4:
28362835
FUNC_RESTORE
28372836
ret
28382837
SYM_FUNC_END(aesni_gcm_finalize_avx_gen4)
2839-
2840-
#endif /* CONFIG_AS_AVX2 */

‎arch/x86/crypto/aesni-intel_glue.c

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -233,7 +233,6 @@ static const struct aesni_gcm_tfm_s aesni_gcm_tfm_avx_gen2 = {
233233
.finalize = &aesni_gcm_finalize_avx_gen2,
234234
};
235235

236-
#ifdef CONFIG_AS_AVX2
237236
/*
238237
* asmlinkage void aesni_gcm_init_avx_gen4()
239238
* gcm_data *my_ctx_data, context data
@@ -276,8 +275,6 @@ static const struct aesni_gcm_tfm_s aesni_gcm_tfm_avx_gen4 = {
276275
.finalize = &aesni_gcm_finalize_avx_gen4,
277276
};
278277

279-
#endif
280-
281278
static inline struct
282279
aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
283280
{
@@ -706,10 +703,8 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req,
706703
if (!enc)
707704
left -= auth_tag_len;
708705

709-
#ifdef CONFIG_AS_AVX2
710706
if (left < AVX_GEN4_OPTSIZE && gcm_tfm == &aesni_gcm_tfm_avx_gen4)
711707
gcm_tfm = &aesni_gcm_tfm_avx_gen2;
712-
#endif
713708
if (left < AVX_GEN2_OPTSIZE && gcm_tfm == &aesni_gcm_tfm_avx_gen2)
714709
gcm_tfm = &aesni_gcm_tfm_sse;
715710

@@ -1069,12 +1064,10 @@ static int __init aesni_init(void)
10691064
if (!x86_match_cpu(aesni_cpu_id))
10701065
return -ENODEV;
10711066
#ifdef CONFIG_X86_64
1072-
#ifdef CONFIG_AS_AVX2
10731067
if (boot_cpu_has(X86_FEATURE_AVX2)) {
10741068
pr_info("AVX2 version of gcm_enc/dec engaged.\n");
10751069
aesni_gcm_tfm = &aesni_gcm_tfm_avx_gen4;
10761070
} else
1077-
#endif
10781071
if (boot_cpu_has(X86_FEATURE_AVX)) {
10791072
pr_info("AVX version of gcm_enc/dec engaged.\n");
10801073
aesni_gcm_tfm = &aesni_gcm_tfm_avx_gen2;

‎arch/x86/crypto/chacha_glue.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -79,8 +79,7 @@ static void chacha_dosimd(u32 *state, u8 *dst, const u8 *src,
7979
}
8080
}
8181

82-
if (IS_ENABLED(CONFIG_AS_AVX2) &&
83-
static_branch_likely(&chacha_use_avx2)) {
82+
if (static_branch_likely(&chacha_use_avx2)) {
8483
while (bytes >= CHACHA_BLOCK_SIZE * 8) {
8584
chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);
8685
bytes -= CHACHA_BLOCK_SIZE * 8;
@@ -288,8 +287,7 @@ static int __init chacha_simd_mod_init(void)
288287

289288
static_branch_enable(&chacha_use_simd);
290289

291-
if (IS_ENABLED(CONFIG_AS_AVX2) &&
292-
boot_cpu_has(X86_FEATURE_AVX) &&
290+
if (boot_cpu_has(X86_FEATURE_AVX) &&
293291
boot_cpu_has(X86_FEATURE_AVX2) &&
294292
cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
295293
static_branch_enable(&chacha_use_avx2);

‎arch/x86/crypto/poly1305-x86_64-cryptogams.pl

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1514,10 +1514,6 @@ sub poly1305_iteration {
15141514

15151515
if ($avx>1) {
15161516

1517-
if ($kernel) {
1518-
$code .= "#ifdef CONFIG_AS_AVX2\n";
1519-
}
1520-
15211517
my ($H0,$H1,$H2,$H3,$H4, $MASK, $T4,$T0,$T1,$T2,$T3, $D0,$D1,$D2,$D3,$D4) =
15221518
map("%ymm$_",(0..15));
15231519
my $S4=$MASK;
@@ -2808,10 +2804,6 @@ sub poly1305_blocks_avxN {
28082804
poly1305_blocks_avxN(0);
28092805
&end_function("poly1305_blocks_avx2");
28102806

2811-
if($kernel) {
2812-
$code .= "#endif\n";
2813-
}
2814-
28152807
#######################################################################
28162808
if ($avx>2) {
28172809
# On entry we have input length divisible by 64. But since inner loop

‎arch/x86/crypto/poly1305_glue.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,7 @@ static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len,
108108
kernel_fpu_begin();
109109
if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512))
110110
poly1305_blocks_avx512(ctx, inp, bytes, padbit);
111-
else if (IS_ENABLED(CONFIG_AS_AVX2) && static_branch_likely(&poly1305_use_avx2))
111+
else if (static_branch_likely(&poly1305_use_avx2))
112112
poly1305_blocks_avx2(ctx, inp, bytes, padbit);
113113
else
114114
poly1305_blocks_avx(ctx, inp, bytes, padbit);
@@ -264,8 +264,7 @@ static int __init poly1305_simd_mod_init(void)
264264
if (boot_cpu_has(X86_FEATURE_AVX) &&
265265
cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
266266
static_branch_enable(&poly1305_use_avx);
267-
if (IS_ENABLED(CONFIG_AS_AVX2) && boot_cpu_has(X86_FEATURE_AVX) &&
268-
boot_cpu_has(X86_FEATURE_AVX2) &&
267+
if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_AVX2) &&
269268
cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
270269
static_branch_enable(&poly1305_use_avx2);
271270
if (IS_ENABLED(CONFIG_AS_AVX512) && boot_cpu_has(X86_FEATURE_AVX) &&

‎arch/x86/crypto/sha1_ssse3_glue.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,6 @@ static void unregister_sha1_avx(void)
174174
crypto_unregister_shash(&sha1_avx_alg);
175175
}
176176

177-
#if defined(CONFIG_AS_AVX2)
178177
#define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
179178

180179
asmlinkage void sha1_transform_avx2(struct sha1_state *state,
@@ -246,11 +245,6 @@ static void unregister_sha1_avx2(void)
246245
crypto_unregister_shash(&sha1_avx2_alg);
247246
}
248247

249-
#else
250-
static inline int register_sha1_avx2(void) { return 0; }
251-
static inline void unregister_sha1_avx2(void) { }
252-
#endif
253-
254248
#ifdef CONFIG_AS_SHA1_NI
255249
asmlinkage void sha1_ni_transform(struct sha1_state *digest, const u8 *data,
256250
int rounds);

‎arch/x86/crypto/sha256-avx2-asm.S

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,6 @@
4848
# This code schedules 2 blocks at a time, with 4 lanes per block
4949
########################################################################
5050

51-
#ifdef CONFIG_AS_AVX2
5251
#include <linux/linkage.h>
5352

5453
## assume buffers not aligned
@@ -767,5 +766,3 @@ _SHUF_00BA:
767766
.align 32
768767
_SHUF_DC00:
769768
.octa 0x0b0a090803020100FFFFFFFFFFFFFFFF,0x0b0a090803020100FFFFFFFFFFFFFFFF
770-
771-
#endif

‎arch/x86/crypto/sha256_ssse3_glue.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -220,7 +220,6 @@ static void unregister_sha256_avx(void)
220220
ARRAY_SIZE(sha256_avx_algs));
221221
}
222222

223-
#if defined(CONFIG_AS_AVX2)
224223
asmlinkage void sha256_transform_rorx(struct sha256_state *state,
225224
const u8 *data, int blocks);
226225

@@ -295,11 +294,6 @@ static void unregister_sha256_avx2(void)
295294
ARRAY_SIZE(sha256_avx2_algs));
296295
}
297296

298-
#else
299-
static inline int register_sha256_avx2(void) { return 0; }
300-
static inline void unregister_sha256_avx2(void) { }
301-
#endif
302-
303297
#ifdef CONFIG_AS_SHA256_NI
304298
asmlinkage void sha256_ni_transform(struct sha256_state *digest,
305299
const u8 *data, int rounds);

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